From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 63DAFA04FF for ; Mon, 18 Apr 2022 09:30:02 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 48AC940C35; Mon, 18 Apr 2022 09:30:02 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 9C86240141; Mon, 18 Apr 2022 09:29:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650266999; x=1681802999; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=9WbL7EYoqY8s6vObaOu/tAocy79sYGsJrnz4i8UUiC0=; b=YbwcqYjY8X1lb9POcb264pVjq458npmYFvoZv/D+zBXyscWu1NdwxKpY pGky0aYyAJf+qI4F/3zbVKunSX7FVHQrABFQvh0Yqex2PjntDTsoyWxFg JYyAndFekRFIx7GRT8mbWU4/nuoQLVOWUjp9snlucrmn42SKXsTm7cKn+ js6sxSJTCVe00/r3pacCv3OTyz+EkWtX6DV44wgTKo+2mtN4gV49Iophs q0kQC1sVzawASi6sZKBuvNYMQlFBEjwVXxhgo8fCljj3c0XjKwW3Bn/Ja skwtgLHL0nnDnHFWbuiHuUEnoSkFJs8cA+WnfR2MY+3qgB3oVfQTh8scY w==; X-IronPort-AV: E=McAfee;i="6400,9594,10320"; a="245360930" X-IronPort-AV: E=Sophos;i="5.90,269,1643702400"; d="scan'208";a="245360930" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Apr 2022 00:29:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,269,1643702400"; d="scan'208";a="701733431" Received: from fmsmsx606.amr.corp.intel.com ([10.18.126.86]) by fmsmga001.fm.intel.com with ESMTP; 18 Apr 2022 00:29:58 -0700 Received: from fmsmsx605.amr.corp.intel.com (10.18.126.85) by fmsmsx606.amr.corp.intel.com (10.18.126.86) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.27; Mon, 18 Apr 2022 00:29:57 -0700 Received: from fmsmsx605.amr.corp.intel.com ([10.18.126.85]) by fmsmsx605.amr.corp.intel.com ([10.18.126.85]) with mapi id 15.01.2308.027; Mon, 18 Apr 2022 00:29:57 -0700 From: "Zhang, Qi Z" To: "Xu, Ting" , "dev@dpdk.org" CC: "Guo, Junfeng" , "stable@dpdk.org" , "Yang, Qiming" Subject: RE: [PATCH v3] net/ice: fix raw flow input pattern value change in FDIR Thread-Topic: [PATCH v3] net/ice: fix raw flow input pattern value change in FDIR Thread-Index: AQHYUvGePtbSP2YzHUObNQPvTnVF6qz1RhPA Date: Mon, 18 Apr 2022 07:29:57 +0000 Message-ID: <35e91c70162a499eb6ce008584e42284@intel.com> References: <20220318031650.2580-1-ting.xu@intel.com> <20220418065908.57171-1-ting.xu@intel.com> In-Reply-To: <20220418065908.57171-1-ting.xu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.6.401.20 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org > -----Original Message----- > From: Xu, Ting > Sent: Monday, April 18, 2022 2:59 PM > To: dev@dpdk.org > Cc: Guo, Junfeng ; Xu, Ting ; > stable@dpdk.org; Yang, Qiming ; Zhang, Qi Z > > Subject: [PATCH v3] net/ice: fix raw flow input pattern value change in F= DIR >=20 > When parsing raw flow pattern in FDIR, the input parameter spec and mask > are used directly and the original value will be changed. It will cause e= rror if > these values are used in other functions. In this patch, temporary variab= les > are created to store the spec and mask. >=20 > Fixes: 25be39cc1760 ("net/ice: enable protocol agnostic flow offloading i= n > FDIR") >=20 > Cc: stable@dpdk.org >=20 > Signed-off-by: Ting Xu > --- > drivers/net/ice/ice_fdir_filter.c | 25 +++++++++++++++++++------ > 1 file changed, 19 insertions(+), 6 deletions(-) >=20 > diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir= _filter.c > index 0982478feb..7914ba9407 100644 > --- a/drivers/net/ice/ice_fdir_filter.c > +++ b/drivers/net/ice/ice_fdir_filter.c > @@ -1870,10 +1870,11 @@ ice_fdir_parse_pattern(__rte_unused struct > ice_adapter *ad, > break; >=20 > /* convert raw spec & mask from byte string to int */ > - unsigned char *tmp_spec =3D > + unsigned char *spec_pattern =3D > (uint8_t *)(uintptr_t)raw_spec->pattern; > - unsigned char *tmp_mask =3D > + unsigned char *mask_pattern =3D > (uint8_t *)(uintptr_t)raw_mask->pattern; > + uint8_t *tmp_spec, *tmp_mask; > uint16_t tmp_val =3D 0; > uint8_t pkt_len =3D 0; > uint8_t tmp =3D 0; > @@ -1884,8 +1885,18 @@ ice_fdir_parse_pattern(__rte_unused struct > ice_adapter *ad, > pkt_len) > return -rte_errno; >=20 > + tmp_spec =3D rte_zmalloc(NULL, pkt_len / 2, 0); > + if (!tmp_spec) > + return -rte_errno; > + > + tmp_mask =3D rte_zmalloc(NULL, pkt_len / 2, 0); > + if (!tmp_mask) { > + rte_free(tmp_spec); > + return -rte_errno; > + } > + > for (i =3D 0, j =3D 0; i < pkt_len; i +=3D 2, j++) { > - tmp =3D tmp_spec[i]; > + tmp =3D spec_pattern[i]; > if (tmp >=3D 'a' && tmp <=3D 'f') > tmp_val =3D tmp - 'a' + 10; > if (tmp >=3D 'A' && tmp <=3D 'F') > @@ -1894,7 +1905,7 @@ ice_fdir_parse_pattern(__rte_unused struct > ice_adapter *ad, > tmp_val =3D tmp - '0'; >=20 > tmp_val *=3D 16; > - tmp =3D tmp_spec[i + 1]; > + tmp =3D spec_pattern[i + 1]; > if (tmp >=3D 'a' && tmp <=3D 'f') > tmp_spec[j] =3D tmp_val + tmp - 'a' + 10; > if (tmp >=3D 'A' && tmp <=3D 'F') > @@ -1902,7 +1913,7 @@ ice_fdir_parse_pattern(__rte_unused struct > ice_adapter *ad, > if (tmp >=3D '0' && tmp <=3D '9') > tmp_spec[j] =3D tmp_val + tmp - '0'; >=20 > - tmp =3D tmp_mask[i]; > + tmp =3D mask_pattern[i]; > if (tmp >=3D 'a' && tmp <=3D 'f') > tmp_val =3D tmp - 'a' + 10; > if (tmp >=3D 'A' && tmp <=3D 'F') > @@ -1911,7 +1922,7 @@ ice_fdir_parse_pattern(__rte_unused struct > ice_adapter *ad, > tmp_val =3D tmp - '0'; >=20 > tmp_val *=3D 16; > - tmp =3D tmp_mask[i + 1]; > + tmp =3D mask_pattern[i + 1]; > if (tmp >=3D 'a' && tmp <=3D 'f') > tmp_mask[j] =3D tmp_val + tmp - 'a' + 10; > if (tmp >=3D 'A' && tmp <=3D 'F') > @@ -1947,6 +1958,8 @@ ice_fdir_parse_pattern(__rte_unused struct > ice_adapter *ad, >=20 > filter->parser_ena =3D true; >=20 > + rte_free(tmp_spec); > + rte_free(tmp_mask); > break; > } >=20 > -- > 2.17.1 Added Acked-by: Junfeng Guo from V2 Applied to dpdk-next-net-intel. Thanks Qi