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From: "Wiles, Keith" <keith.wiles@intel.com>
To: Yongseok Koh <yskoh@mellanox.com>
CC: Thomas Monjalon <thomas@monjalon.net>, "Richardson, Bruce"
<bruce.richardson@intel.com>, "Yigit, Ferruh" <ferruh.yigit@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>, Shahaf Shuler <shahafs@mellanox.com>,
"Ananyev, Konstantin" <konstantin.ananyev@intel.com>, "Burakov, Anatoly"
<anatoly.burakov@intel.com>, "stable@dpdk.org" <stable@dpdk.org>
Thread-Topic: [dpdk-dev] [PATCH v2] build: disable compiler AVX512F support
Thread-Index: AQHUcu+vmWpd/xglbEqZ2Y8mm6wxz6VBwceAgAIOQ4CAAMHsgA==
Date: Wed, 7 Nov 2018 09:04:20 +0000
Message-ID: <432F92CE-5714-45DC-B72F-CD8771DAFC89@intel.com>
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Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH v2] build: disable compiler
AVX512F support
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> On Nov 6, 2018, at 9:30 PM, Yongseok Koh <yskoh@mellanox.com> wrote:
>=20
>=20
>> On Nov 5, 2018, at 6:06 AM, Wiles, Keith <keith.wiles@intel.com> wrote:
>>=20
>>=20
>>=20
>>> On Nov 2, 2018, at 9:04 PM, Yongseok Koh <yskoh@mellanox.com> wrote:
>>>=20
>>> This is a workaround to prevent a crash, which might be caused by
>>> optimization of newer gcc (7.3.0) on Intel Skylake.
>>=20
>> Should the code below not also test for the gcc version and the Sky Lake=
processor, maybe I am wrong but it seems it is turning AVX512 for all GCC =
builds
>=20
> I didn't want to check gcc version as 7.3.0 is very new. Only gcc 8 is ne=
wly up since then (gcc 8.2).
> Also, I wasn't able to test every gcc versions and I wanted to be a bit c=
onservative for this crash.
> Performance drop (if any) by disabling a new (experimental) feature would=
be less risky than unaccountable crash.
> And, it does disable the feature only if CONFIG_RTE_ENABLE_AVX512=3Dn. Pl=
ease refer to v3.
Are you not turning off all of the GCC versions for AVX512. And you can tes=
t for range or greater then GCC version and it just seems like we are turni=
ng off every gcc version, is that true?
>=20
>>=20
>> Also bug 97 seems a bit obscure reference, maybe you know the bug report=
, but more details would be good?
>=20
> I sent out the report to dev list two month ago. And I created the Bug 97=
in order to reference it in the commit message.
> I didn't want to repeat same message here and there, but it would've been=
better to have some sort of summary of the Bug, although v3 has a few more=
words. However, v3 has been merged.
Still this is too obscure if nothing else give a link to a specific bug not=
just 97.
>=20
> Thanks,
> Yongseok
>=20
>>>=20
>>> Bugzilla ID: 97
>>>=20
>>> Cc: stable@dpdk.org
>>>=20
>>> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
>>> ---
>>>=20
>>> v2:
>>> * disable the flag only in case of gcc
>>>=20
>>> config/x86/meson.build | 5 +++++
>>> mk/rte.cpuflags.mk | 7 +++++++
>>> 2 files changed, 12 insertions(+)
>>>=20
>>> diff --git a/config/x86/meson.build b/config/x86/meson.build
>>> index 33efb5e547..8ddca0ea9f 100644
>>> --- a/config/x86/meson.build
>>> +++ b/config/x86/meson.build
>>> @@ -47,6 +47,11 @@ endif
>>> if cc.get_define('__AVX512F__', args: march_opt) !=3D ''
>>> dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX512F', 1)
>>> compile_time_cpuflags +=3D ['RTE_CPUFLAG_AVX512F']
>>> +else
>>> +# disable AVX512F support of gcc as a workaround for Bug 97
>>> + if cc.get_id() =3D=3D 'gcc' and cc.has_argument('-mavx512f')
>>> + machine_args +=3D '-mno-avx512f'
>>> + endif
>>> endif
>>>=20
>>> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
>>> diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk
>>> index 43ed84155b..a8c26fb011 100644
>>> --- a/mk/rte.cpuflags.mk
>>> +++ b/mk/rte.cpuflags.mk
>>> @@ -68,6 +68,13 @@ endif
>>> ifneq ($(filter $(AUTO_CPUFLAGS),__AVX512F__),)
>>> ifeq ($(CONFIG_RTE_ENABLE_AVX512),y)
>>> CPUFLAGS +=3D AVX512F
>>> +else
>>> +# disable AVX512F support of gcc as a workaround for Bug 97
>>> +ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
>>> + ifeq ($(shell $(CC) --target-help | grep -q mavx512f && echo 1), 1)
>>> + MACHINE_CFLAGS +=3D -mno-avx512f
>>> + endif
>>> +endif
>>> endif
>>> endif
>>>=20
>>> --=20
>>> 2.11.0
>>>=20
>>=20
>> Regards,
>> Keith
>=20
Regards,
Keith