From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8999CA0C46 for ; Thu, 22 Jul 2021 16:25:14 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7ADAA40E50; Thu, 22 Jul 2021 16:25:14 +0200 (CEST) Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) by mails.dpdk.org (Postfix) with ESMTP id E7DDD40040; Thu, 22 Jul 2021 16:25:11 +0200 (CEST) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id 7D90E5C0189; Thu, 22 Jul 2021 10:25:11 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Thu, 22 Jul 2021 10:25:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= niCCnWtbar9o5wWZSrYzkx5zm4QpdfWLU8GnLJiHcC4=; b=TOHcVQDCYoVPQ+s1 pqstgkVs7F7ydPNpmUtK7q7+wN1FtZYgpGE1+Z1LX8t/wL75JeRSrl9tEz3JJnO+ seipg9b6PHYSKmC4OVh3dUXtL5429z0OSEPDrjhP9Z44qj5y2ZQckWqONlDLSoiN oI7Bt5OJkU7RRn3FQxgwiyfsjJJ6H5xMo8I4BqcXplnL4MT/dRfEeow7TtD0U6ZX 28KQ2b7h++Gno+tfxc3/iMzSqpxP4yAGo3YmlWlo5WddNcoH/vbLR7InhK+nR03U 3H6xDXIevpGULBtZAM4mBM4pW/3dvgHMHc97PXvFbVzt2pIdlQijkREWqil2qEX2 djNTWA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=niCCnWtbar9o5wWZSrYzkx5zm4QpdfWLU8GnLJiHc C4=; b=XTMm8PmrYJZqLYxY5BOi9+pcGOWsWxJfs/1OgVrlfT1AR9Y8pSGxpGRVT sdnlnYLKa8g+prprLhZbzmioqdOT0IAptctb8DGxAmmhwHW2FTyjYu2Sqj5ytcGD SU51Ug3XL8YUGMKWvQ1TDWKKpMZ86n/FFnESgdVIcoyUAh3eVu1ar1+d6tRoNdWB 8T3VKJghu27BYtdP/lsorMEGHkLitQZ6ESwgsq7WZkIpVb9tTQekQM9YLWQQOMyd dpKNGI/sgCP21eww+mvBAPSFAIttZe2mn9Vbg96XIMVHQRZoUJOcA4Xfz/TySnK4 0bOtalz3ld46MYbb/Mp45Muj6tLOg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrfeeigdejgecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpedugefgvdefudfftdefgeelgffhueekgfffhfeujedtteeutdejueei iedvffegheenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhroh hmpehthhhomhgrshesmhhonhhjrghlohhnrdhnvght X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 22 Jul 2021 10:25:10 -0400 (EDT) From: Thomas Monjalon To: Alexander Kozyrev Cc: dev@dpdk.org, stable@dpdk.org, rasland@nvidia.com, matan@nvidia.com, viacheslavo@nvidia.com Date: Thu, 22 Jul 2021 16:25:27 +0200 Message-ID: <4977419.P8Za4hhJ44@thomas> In-Reply-To: <20210720075138.985097-1-akozyrev@nvidia.com> References: <20210720074743.984951-1-akozyrev@nvidia.com> <20210720075138.985097-1-akozyrev@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH v2] net/mlx5: fix meta register conversion for extensive mode X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" 20/07/2021 09:51, Alexander Kozyrev: > Register C is used in the extensive metadata mode number 1 and its > width can vary from 0 to 32 bits depending on the kernel usage of it. > > There are several issues associated with this mode (dv_xmeta_en=1): > 1. The metadata setting assumes that the width is always 16 bits, > which is the most common case in this mode. Use the proper mask. > 2. The same is true for the modify_field Flow API. 16-bits width > is hardcoded for dv_xmeta_en=1. Switch to the register C mask width. > 3. Metadata is stored in the most significant bits in CQE in this > mode because the registers copy code was not updated during the > metadata conversion to the big-endian format. Update this code to > avoid shifting the metadata in the datapath. > > Fixes: b57e414b48 ("net/mlx5: convert meta register to big-endian") > Cc: stable@dpdk.org > > Signed-off-by: Alexander Kozyrev > Acked-by: Viacheslav Ovsiienko Applied, thanks