From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by dpdk.org (Postfix) with ESMTP id C3E861B1BF; Mon, 8 Jan 2018 16:54:58 +0100 (CET) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 03FBEC0567A2; Mon, 8 Jan 2018 15:54:58 +0000 (UTC) Received: from [10.36.112.43] (ovpn-112-43.ams2.redhat.com [10.36.112.43]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E19365D72B; Mon, 8 Jan 2018 15:54:50 +0000 (UTC) To: Stephen Hemminger Cc: dev@dpdk.org, stable@dpdk.org, jianfeng.tan@intel.com, santosh.shukla@caviumnetworks.com, anatoly.burakov@intel.com, thomas@monjalon.net, peterx@redhat.com References: <20180108135127.25869-1-maxime.coquelin@redhat.com> <20180108073841.43c15072@xeon-e3> From: Maxime Coquelin Message-ID: <62b32cc7-68a8-806c-d4fb-e15addbeabfb@redhat.com> Date: Mon, 8 Jan 2018 16:54:48 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20180108073841.43c15072@xeon-e3> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 08 Jan 2018 15:54:58 +0000 (UTC) Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH] bus/pci: forbid VA as IOVA mode if IOMMU address width too small X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Jan 2018 15:54:59 -0000 On 01/08/2018 04:38 PM, Stephen Hemminger wrote: > On Mon, 8 Jan 2018 14:51:27 +0100 > Maxime Coquelin wrote: > >> +static inline bool >> +pci_one_device_iommu_support_va(struct rte_pci_device *dev) >> +{ >> +#if defined(RTE_ARCH_PPC_64) >> + return false; >> +#elif defined(RTE_ARCH_X86) >> + > > The cleaner way to handle this kind of ifdef is: > > #ifdef RTE_ARCH_X86 > static bool > pci_one_device_iommu_support_va(struct rte_pci_device *dev) > { > .... > } > #elif defined(RTE_ARCH_PPC_64) > static inline bool > pci_one_device_iommu_support_va(struct rte_pci_device *dev) > { > return false; > } > #endif Ok, thanks. I do this in v2. > What about AMD64? I haven't checked AMD64 spec yet. > Do all ARM processors have IOMMU, I think not. No, not all have an IOMMU, and I don't know if those which have one have such limitations. But if they don't, they cannot use VFIO without noiommu enabled. This patch only change behavior for Intel, and could be extended to other HW if needed. Regards, Maxime