* Re: [PATCH v1 1/1] baseband/acc: fix ACC100 HARQ input is alignment
2023-09-19 18:24 ` [PATCH v1 1/1] baseband/acc: fix ACC100 HARQ input is alignment Hernan Vargas
@ 2023-10-03 16:10 ` Maxime Coquelin
2023-10-12 12:53 ` Maxime Coquelin
1 sibling, 0 replies; 3+ messages in thread
From: Maxime Coquelin @ 2023-10-03 16:10 UTC (permalink / raw)
To: Hernan Vargas, dev, gakhil, trix; +Cc: nicolas.chautru, qi.z.zhang, stable
On 9/19/23 20:24, Hernan Vargas wrote:
> Some constraints are imposed onto the ACC100 HARQ input size,
> but that value is incorrectly aligned down when getting close to
> max (Ncb-F) which is not required.
> The wireless performance impact is negligeable but still causes a
> few LLRs no to be combined at the very end of the circular buffer.
>
> Fixes: 5802f36dd492 ("baseband/acc100: enforce additional check on FCW")
> Cc: stable@dpdk.org
>
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
> drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
> index 5362d39c302f..c736f3e4201c 100644
> --- a/drivers/baseband/acc/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc/rte_acc100_pmd.c
> @@ -1218,7 +1218,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
> - op->ldpc_dec.n_filler);
>
> /* Alignment on next 64B - Already enforced from HC output */
> - harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC_HARQ_ALIGN_64B);
> + harq_in_length = RTE_ALIGN_CEIL(harq_in_length, ACC_HARQ_ALIGN_64B);
>
> /* Stronger alignment requirement when in decompression mode */
> if (fcw->hcin_decomp_mode > 0)
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thanks,
Maxime
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v1 1/1] baseband/acc: fix ACC100 HARQ input is alignment
2023-09-19 18:24 ` [PATCH v1 1/1] baseband/acc: fix ACC100 HARQ input is alignment Hernan Vargas
2023-10-03 16:10 ` Maxime Coquelin
@ 2023-10-12 12:53 ` Maxime Coquelin
1 sibling, 0 replies; 3+ messages in thread
From: Maxime Coquelin @ 2023-10-12 12:53 UTC (permalink / raw)
To: Hernan Vargas, dev, gakhil, trix; +Cc: nicolas.chautru, qi.z.zhang, stable
On 9/19/23 20:24, Hernan Vargas wrote:
> Some constraints are imposed onto the ACC100 HARQ input size,
> but that value is incorrectly aligned down when getting close to
> max (Ncb-F) which is not required.
> The wireless performance impact is negligeable but still causes a
> few LLRs no to be combined at the very end of the circular buffer.
>
> Fixes: 5802f36dd492 ("baseband/acc100: enforce additional check on FCW")
> Cc: stable@dpdk.org
>
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
> drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
> index 5362d39c302f..c736f3e4201c 100644
> --- a/drivers/baseband/acc/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc/rte_acc100_pmd.c
> @@ -1218,7 +1218,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
> - op->ldpc_dec.n_filler);
>
> /* Alignment on next 64B - Already enforced from HC output */
> - harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC_HARQ_ALIGN_64B);
> + harq_in_length = RTE_ALIGN_CEIL(harq_in_length, ACC_HARQ_ALIGN_64B);
>
> /* Stronger alignment requirement when in decompression mode */
> if (fcw->hcin_decomp_mode > 0)
Applied to next-baseband/for-main.
Thanks,
Maxime
^ permalink raw reply [flat|nested] 3+ messages in thread