From: zhoumin <zhoumin@loongson.cn>
To: Jiawen Wu <jiawenwu@trustnetic.com>,
'Thomas Monjalon' <thomas@monjalon.net>,
'Ruifeng Wang' <Ruifeng.Wang@arm.com>,
"'Zhang, Qi Z'" <qi.z.zhang@intel.com>
Cc: dev@dpdk.org, mb@smartsharesystems.com,
konstantin.v.ananyev@yandex.ru, "'Yang,
Qiming'" <qiming.yang@intel.com>,
"'Wu, Wenjun1'" <wenjun1.wu@intel.com>,
drc@linux.vnet.ibm.com, roretzla@linux.microsoft.com,
stable@dpdk.org, maobibo@loongson.cn, 'nd' <nd@arm.com>,
david.marchand@redhat.com, honnappa.nagarahalli@arm.com,
'Tyler Retzlaff' <roretzla@microsoft.com>,
konstantin.ananyev@huawei.com
Subject: Re: [PATCH v3] net/ixgbe: add proper memory barriers for some Rx functions
Date: Tue, 13 Jun 2023 18:12:47 +0800 [thread overview]
Message-ID: <77c7af7c-3021-16c9-86b1-dace61822258@loongson.cn> (raw)
In-Reply-To: <03ed01d99da7$6260ca70$27225f50$@trustnetic.com>
Hi Jiawen,
On Tues, June 13, 2023 at 11:30PM, Jiawen Wu wrote:
> On Tuesday, June 13, 2023 9:43 AM, zhoumin wrote:
>> On Mon, June 12, 2023 at 8:44PM, Thomas Monjalon wrote:
>>> 12/06/2023 13:58, zhoumin:
>>>> On Mon, June 12, 2023 at 6:26PM, Thomas Monjalon wrote:
>>>>> 15/05/2023 04:10, Zhang, Qi Z:
>>>>>> From: Ruifeng Wang <Ruifeng.Wang@arm.com>
>>>>>>> From: Min Zhou <zhoumin@loongson.cn>
>>>>>>>> ---
>>>>>>>> v3:
>>>>>>>> - Use rte_smp_rmb() as the proper memory barrier instead of rte_rmb()
>>>>>>>> ---
>>>>>>>> v2:
>>>>>>>> - Make the calling of rte_rmb() for all platforms
>>>>>>>> ---
> Hi zhoumin,
>
> I recently learned that Loongson is doing tests with Wangxun NICs on 3C5000, and also
> found this problem on Wangxun NICs. I'm wondering if it would also be fixed on txgbe/ngbe.
I'm sorry. I have not tested the Wangxun NICs on LRO receiving mode. The
previous test results for Wangxun NICs were normal. I will do additional
tests for Wangxun NICs to verify this problem.
> Thanks.
next prev parent reply other threads:[~2023-06-13 10:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230424090532.367194-1-zhoumin@loongson.cn>
2023-05-06 10:23 ` Min Zhou
2023-05-08 6:03 ` Ruifeng Wang
2023-05-15 2:10 ` Zhang, Qi Z
2023-06-12 10:26 ` Thomas Monjalon
2023-06-12 11:58 ` zhoumin
2023-06-12 12:44 ` Thomas Monjalon
2023-06-13 1:42 ` zhoumin
2023-06-13 3:30 ` Jiawen Wu
2023-06-13 10:12 ` zhoumin [this message]
2023-06-14 10:58 ` Konstantin Ananyev
2023-06-13 9:25 ` Ruifeng Wang
2023-06-20 15:52 ` Thomas Monjalon
2023-06-21 6:50 ` Ruifeng Wang
2023-06-13 9:44 ` [PATCH v4] " Min Zhou
2023-06-13 10:20 ` Ruifeng Wang
2023-06-13 12:11 ` Zhang, Qi Z
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