From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 33C16A0505 for ; Fri, 20 May 2022 09:11:20 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2EDE942B7A; Fri, 20 May 2022 09:11:20 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B82D2427ED; Fri, 20 May 2022 09:11:17 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24JNtKxu018343; Fri, 20 May 2022 00:11:16 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=9uvcsjWtzY7GWetRKp491e/cOYEH67BH6JKpGWQOZ0A=; b=hnef/rISWmi4qyN5WzZHMNOTKuPCgpl5NFdVD5R1Tpr6qQaJ2Vo5IxJG7wKGXfQazOvo w5+fRhnNTkGGn1CAOiaeeEgTdlHgtZpZKFZ+qKw1+29Unz0HLIiydUcB2QCnSG8t3Ow+ 5KviDVzGs1U/n6uzjqOFLdDrWa2xAjePvnYcFt+hjeXlFyCn2rQwiBxJVo8gzAWN/Z3U xNBRYu8XbhkPmXsavOBEuSf5nU5bY3iLTEUdQLLHwa9gKNrpyNnMEDGFvYV4XStKNiwk npPT+2MG60tLt4NNAeLafCoZ2GvvO53DGjGJbPLGRmA0+cI/wV/w9poVtaw5uIxGgeWA Tw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3g6008sddb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 20 May 2022 00:11:16 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 20 May 2022 00:11:15 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 20 May 2022 00:11:15 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 825185B6926; Fri, 20 May 2022 00:11:13 -0700 (PDT) From: Shijith Thotton To: , CC: Shijith Thotton , , Subject: [PATCH] drivers: fix cnxk event qos devarg processing Date: Fri, 20 May 2022 12:41:05 +0530 Message-ID: <9da85a53252e304aef90f0e54805feaee61b75c5.1653030578.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: RuYWt44GurCB-LpTZOxsF6SU4-NcjhDP X-Proofpoint-ORIG-GUID: RuYWt44GurCB-LpTZOxsF6SU4-NcjhDP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-20_02,2022-05-19_03,2022-02-23_01 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Fixed qos parameters getting over written and IAQ/TAQ threshold calculation. Fixes: 910da32c53a9 ("event/cnxk: add device start") Cc: stable@dpdk.org Signed-off-by: Shijith Thotton --- drivers/common/cnxk/roc_sso.c | 4 ++-- drivers/event/cnxk/cnxk_eventdev.c | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c index 358d37a9f2..8251c967fb 100644 --- a/drivers/common/cnxk/roc_sso.c +++ b/drivers/common/cnxk/roc_sso.c @@ -406,10 +406,10 @@ roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos, } req->grp = qos[i].hwgrp; req->xaq_limit = (nb_xaq * (xaq_prcnt ? xaq_prcnt : 100)) / 100; - req->taq_thr = (SSO_HWGRP_IAQ_MAX_THR_MASK * + req->iaq_thr = (SSO_HWGRP_IAQ_MAX_THR_MASK * (iaq_prcnt ? iaq_prcnt : 100)) / 100; - req->iaq_thr = (SSO_HWGRP_TAQ_MAX_THR_MASK * + req->taq_thr = (SSO_HWGRP_TAQ_MAX_THR_MASK * (taq_prcnt ? taq_prcnt : 100)) / 100; } diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c index b66f241ef8..2455b7be2d 100644 --- a/drivers/event/cnxk/cnxk_eventdev.c +++ b/drivers/event/cnxk/cnxk_eventdev.c @@ -513,10 +513,10 @@ cnxk_sso_start(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn, plt_sso_dbg(); for (i = 0; i < dev->qos_queue_cnt; i++) { - qos->hwgrp = dev->qos_parse_data[i].queue; - qos->iaq_prcnt = dev->qos_parse_data[i].iaq_prcnt; - qos->taq_prcnt = dev->qos_parse_data[i].taq_prcnt; - qos->xaq_prcnt = dev->qos_parse_data[i].xaq_prcnt; + qos[i].hwgrp = dev->qos_parse_data[i].queue; + qos[i].iaq_prcnt = dev->qos_parse_data[i].iaq_prcnt; + qos[i].taq_prcnt = dev->qos_parse_data[i].taq_prcnt; + qos[i].xaq_prcnt = dev->qos_parse_data[i].xaq_prcnt; } rc = roc_sso_hwgrp_qos_config(&dev->sso, qos, dev->qos_queue_cnt, dev->xae_cnt); -- 2.25.1