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To: =?UTF-8?Q?N=c3=a9lio_Laranjeiro?= <nelio.laranjeiro@6wind.com>,
 Yongseok Koh <yskoh@mellanox.com>
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 <20171025091934.hvf5fv4bpkzaba2u@laranjeiro-vm>
From: Ferruh Yigit <ferruh.yigit@intel.com>
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Date: Wed, 25 Oct 2017 14:34:43 -0700
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Subject: Re: [dpdk-stable] [PATCH v2] net/mlx5: fix Tx doorbell memory
	barrier
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On 10/25/2017 2:19 AM, Nélio Laranjeiro wrote:
> On Tue, Oct 24, 2017 at 05:27:25PM -0700, Yongseok Koh wrote:
>> Configuring UAR as IO-mapped makes maximum throughput decline by noticeable
>> amount. If UAR is configured as write-combining register, a write memory
>> barrier is needed on ringing a doorbell. rte_wmb() is mostly effective when
>> the size of a burst is comparatively small. Revert the register back to
>> write-combining and enforce a write memory barrier instead, except for
>> vectorized Tx burst routines. Application can change it by setting
>> MLX5_SHUT_UP_BF under its own necessity.
>>
>> Fixes: 9f9bebae5530 ("net/mlx5: don't map doorbell register to write combining")
>> Cc: stable@dpdk.org
>> Cc: Sagi Grimberg <sagi@grimberg.me>
>> Cc: Alexander Solganik <solganik@gmail.com>
>>
>> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
>> Acked-by: Shahaf Shuler <shahafs@mellanox.com>
> 
> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>

Applied to dpdk-next-net/master, thanks.