From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-ve1eur01on0041.outbound.protection.outlook.com [104.47.1.41]) by dpdk.org (Postfix) with ESMTP id 198831B1B5 for ; Sat, 7 Oct 2017 00:18:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=uu+B4VQYHSihV1jUmNchJeQCY6/0BhLiqbkxzjkvOqU=; b=koUbUm/H+TPuqNdZmmydaFRyqIF5WOoTriBXgBFVpf8vY9tvBwvSufDx6IE1bL7qgyRQmKhoIM9rSQ/F7AYGXoz3eusPlfeJOZQ1wBGFMEq3J5LVQuHNYkEumOpk1Yejpg3pXxSlmadvbnAoRuU0iczfo8v6hlWe3otkDwla+FQ= Received: from VI1PR0501MB2045.eurprd05.prod.outlook.com (10.167.195.147) by VI1PR0501MB2048.eurprd05.prod.outlook.com (10.167.195.150) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.77.7; Fri, 6 Oct 2017 22:18:46 +0000 Received: from VI1PR0501MB2045.eurprd05.prod.outlook.com ([fe80::84ed:9505:3e7f:9722]) by VI1PR0501MB2045.eurprd05.prod.outlook.com ([fe80::84ed:9505:3e7f:9722%13]) with mapi id 15.20.0077.018; Fri, 6 Oct 2017 22:18:46 +0000 From: Yongseok Koh To: "stable@dpdk.org" , Martin Weiser Thread-Topic: [PATCH] net/mlx5: fix deadlock due to buffered slots in Rx SW ring Thread-Index: AQHTPvBl+SLCilpwr0Ose9mTHnpCeaLXZEWA Date: Fri, 6 Oct 2017 22:18:46 +0000 Message-ID: References: <20171006221340.23793-1-yskoh@mellanox.com> In-Reply-To: <20171006221340.23793-1-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-originating-ip: [209.116.155.178] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; VI1PR0501MB2048; 6:toKWEi7Gjgz0wgZ/Xzu1jbZ/12v76zhm91+oQyrXBBjYZKR5SOY5LCmgBxcP1b8UNPCSIvxvZ78HDzdW3UnGiD2TzBoFikQaz9sBbY7Ts+0wFwezh17KU1ZXz8lDXP7St1BgLG/5P/YGf9LJ0Y3zG5aPn4BnV6bSnob8FSsGxYa/72bGpmoS2zKfzulh/qPF7oUIy+oZfVW0VS+Mnl6EamXhIogaly3juyoDvPCXy2AqxhMHM3Be1KVOi7YQ6Ls5MJCNUkoldw+mO+6fZ5He/TXN0GuyD8P+ENJKSZh9P3J/CP37163yczmUmgRp2FY4ohkOzHp294lhhDr/lKQPcQ==; 5:gjt/5UX3aLeoz1xDiZ++XD24Sv36s8/yJxMnEAIoa5o/k5AouSvcxJdlYSNY4p7uv8GtSK2ZfIYrZHUlCq05IWX1K/fe/S8ucTGW+3mZ2vcCejz/e2YHd2bWVyGf/6PB77c3xawua2/KkjdIrnEEFg==; 24:r+cl25xhy99FSPEJteYKx0W9bv9uh+0NKliq7znwcU4TnJJ6WBIZAlQVuk+nPgWG4tra1W2wQT7xNrAPgRBKV/mb662hweB71hvZm/b1lhM=; 7:BPK0OE2El0/RIH19jH1BEKSoCJ8okhYrpd+hyzgRuNwcwSP3Qz1LlUthzOkQ8VF8k11Z0TpT9y/8/ky/B6y2KSqVtw+NYNA5yXYQpRGwl5DTIM2R0dcRDEi4D6McqJx/U9Z2PfKH4KbWrvp/yO5jjEXys3MD3giIc/vsdGrBnYeE4kxqiHiIExYj7Qt3MpB6AcYwMxQT4guKA7irply9nWR8I2ZneFGZIT5GYVZy+2M= x-ms-exchange-antispam-srfa-diagnostics: SSOS; x-ms-office365-filtering-correlation-id: 4c54ab4d-d971-4c6c-871b-08d50d083682 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(2017030254152)(48565401081)(2017052603199)(201703131423075)(201703031133081)(201702281549075); SRVR:VI1PR0501MB2048; x-ms-traffictypediagnostic: VI1PR0501MB2048: x-exchange-antispam-report-test: UriScan:; x-microsoft-antispam-prvs: x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(8121501046)(5005006)(3002001)(93006095)(93001095)(100000703101)(100105400095)(10201501046)(6055026)(6041248)(20161123558100)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123562025)(20161123560025)(20161123555025)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:VI1PR0501MB2048; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:VI1PR0501MB2048; x-forefront-prvs: 0452022BE1 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(6009001)(346002)(376002)(199003)(377454003)(189002)(24454002)(305945005)(7736002)(82746002)(6506006)(8676002)(2900100001)(6436002)(6486002)(68736007)(189998001)(53546010)(110136005)(229853002)(2950100002)(33656002)(102836003)(3846002)(66066001)(36756003)(316002)(6116002)(3660700001)(6512007)(14454004)(8936002)(5660300001)(3280700002)(99286003)(81166006)(81156014)(106356001)(105586002)(97736004)(53936002)(6246003)(2501003)(25786009)(478600001)(101416001)(5250100002)(2906002)(83716003)(86362001)(76176999)(50986999)(54356999); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0501MB2048; H:VI1PR0501MB2045.eurprd05.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Oct 2017 22:18:46.6497 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0501MB2048 Subject: Re: [dpdk-stable] [PATCH] net/mlx5: fix deadlock due to buffered slots in Rx SW ring X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Oct 2017 22:18:48 -0000 My apologies. I put a wrong list of recipients. Please disregard this email, will send out again. Thanks Yongseok > On Oct 6, 2017, at 3:13 PM, Yongseok Koh wrote: >=20 > When replenishing Rx ring, there're always buffered slots reserved betwee= n > consumed entries and HW owned entries. These have to be filled with fake > mbufs to protect from possible overflow rather than optimistically > expecting successful replenishment which can cause deadlock with > small-sized queue. >=20 > Fixes: 951649d21edf ("net/mlx5: fix overflow of Rx SW ring") > Cc: stable@dpdk.org > Cc: martin.weiser@allegro-packets.com >=20 > Reported-by: Martin Weiser > Signed-off-by: Yongseok Koh > --- >=20 > This patch actually reverts "net/mlx5: fix overflow of Rx SW ring". If po= ssible, > these two can be squashed by disregrading the old one. >=20 > drivers/net/mlx5/mlx5_rxtx_vec_sse.c | 20 ++++++++------------ > 1 file changed, 8 insertions(+), 12 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c b/drivers/net/mlx5/mlx5= _rxtx_vec_sse.c > index 075dce908..3f92ce559 100644 > --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.c > +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.c > @@ -548,7 +548,7 @@ rxq_replenish_bulk_mbuf(struct rxq *rxq, uint16_t n) > { > const uint16_t q_n =3D 1 << rxq->elts_n; > const uint16_t q_mask =3D q_n - 1; > - const uint16_t elts_idx =3D rxq->rq_ci & q_mask; > + uint16_t elts_idx =3D rxq->rq_ci & q_mask; > struct rte_mbuf **elts =3D &(*rxq->elts)[elts_idx]; > volatile struct mlx5_wqe_data_seg *wq =3D &(*rxq->wqes)[elts_idx]; > unsigned int i; > @@ -566,6 +566,11 @@ rxq_replenish_bulk_mbuf(struct rxq *rxq, uint16_t n) > wq[i].addr =3D rte_cpu_to_be_64((uintptr_t)elts[i]->buf_addr + > RTE_PKTMBUF_HEADROOM); > rxq->rq_ci +=3D n; > + /* Prevent overflowing into consumed mbufs. */ > + elts_idx =3D rxq->rq_ci & q_mask; > + for (i =3D 0; i < MLX5_VPMD_DESCS_PER_LOOP; i +=3D 2) > + _mm_storeu_si128((__m128i *)&(*rxq->elts)[elts_idx + i], > + _mm_set1_epi64x((uintptr_t)&rxq->fake_mbuf)); > rte_wmb(); > *rxq->rq_db =3D rte_cpu_to_be_32(rxq->rq_ci); > } > @@ -639,13 +644,6 @@ rxq_cq_decompress_v(struct rxq *rxq, > RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=3D > offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12); > /* > - * Not to overflow elts array. Decompress next time after mbuf > - * replenishment. > - */ > - if (unlikely(mcqe_n + MLX5_VPMD_DESCS_PER_LOOP > > - (uint16_t)(rxq->rq_ci - rxq->cq_ci))) > - return; > - /* > * A. load mCQEs into a 128bit register. > * B. store rearm data to mbuf. > * C. combine data from mCQEs with rx_descriptor_fields1. > @@ -1035,10 +1033,8 @@ rxq_burst_v(struct rxq *rxq, struct rte_mbuf **pkt= s, uint16_t pkts_n) > } > elts_idx =3D rxq->rq_pi & q_mask; > elts =3D &(*rxq->elts)[elts_idx]; > - pkts_n =3D RTE_MIN(pkts_n - rcvd_pkt, > - (uint16_t)(rxq->rq_ci - rxq->cq_ci)); > - /* Not to overflow pkts/elts array. */ > - pkts_n =3D RTE_ALIGN_FLOOR(pkts_n, MLX5_VPMD_DESCS_PER_LOOP); > + /* Not to overflow pkts array. */ > + pkts_n =3D RTE_ALIGN_FLOOR(pkts_n - rcvd_pkt, MLX5_VPMD_DESCS_PER_LOOP)= ; > /* Not to cross queue end. */ > pkts_n =3D RTE_MIN(pkts_n, q_n - elts_idx); > if (!pkts_n) > --=20 > 2.11.0 >=20