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From: "Dumitrescu, Cristian" <cristian.dumitrescu@intel.com>
To: "Xu, Ting" <ting.xu@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: "stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-stable] [PATCH v3] lib/table: fix cache alignment issue
Date: Mon, 20 Jul 2020 14:37:35 +0000
Message-ID: <BL0PR11MB2931813A8EE2601B3EB9DD85EB7B0@BL0PR11MB2931.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20200709014825.13690-1-ting.xu@intel.com>



> -----Original Message-----
> From: Xu, Ting <ting.xu@intel.com>
> Sent: Thursday, July 9, 2020 2:48 AM
> To: dev@dpdk.org
> Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; Xu, Ting
> <ting.xu@intel.com>; stable@dpdk.org
> Subject: [PATCH v3] lib/table: fix cache alignment issue
> 
> When create softnic hash table with 16 keys, it failed on 32bit
> environment because of the structure rte_bucket_4_16 alignment
> issue. Add __rte_cache_aligned to ensure correct cache align.
> 
> Fixes: 8aa327214c ("table: hash")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Ting Xu <ting.xu@intel.com>
> 
> ---
> v2->v3: Rebase
> v1->v2: Correct patch time
> ---
>  lib/librte_table/rte_table_hash_key16.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/librte_table/rte_table_hash_key16.c
> b/lib/librte_table/rte_table_hash_key16.c
> index 2cca1c924..5e1665c15 100644
> --- a/lib/librte_table/rte_table_hash_key16.c
> +++ b/lib/librte_table/rte_table_hash_key16.c
> @@ -44,7 +44,7 @@ struct rte_bucket_4_16 {
>  	uint64_t key[4][2];
> 
>  	/* Cache line 2 */
> -	uint8_t data[0];
> +	uint8_t data[0] __rte_cache_aligned;
>  };
> 
>  struct rte_table_hash {
> --
> 2.17.1

Hi Ting,

This fix is breaking the execution for systems with cache line of 128 bytes, as typically (on 64-bit systems) this structure would be 64-byte in size and adding the __rte_cache_aligned would force doubling the size of this structure through padding enforced by the compiler.

Can you please confirm this is caused by check below failing in the table create function:
	sizeof(struct rte_bucket_4_16) % 64) != 0

Since all the other fields in this data structure are explicitly declared as 64-bit fields, due to the alignment rules I was expecting the compiler to add a 32-bit padding field after the "next" field, which is a pointer that would only take 32 bits on 32-bit systems. I am not sure why this did not take place in your case, any thoughts?

Not sure why we would run Soft NIC on 32-bit systems, might be better to disable Soft NIC for 32-bit systems.

Thanks,
Cristian

  reply index

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-16 16:27 [dpdk-stable] [PATCH v1] " Ting Xu
2020-06-17  5:43 ` [dpdk-stable] [PATCH v2] " Ting Xu
2020-07-02  8:06   ` [dpdk-stable] [dpdk-dev] " Zhou, JunX W
2020-07-09  1:48 ` [dpdk-stable] [PATCH v3] " Ting Xu
2020-07-20 14:37   ` Dumitrescu, Cristian [this message]
2020-07-21  5:15     ` Xu, Ting
2020-07-21 21:16       ` Dumitrescu, Cristian
2020-07-22  2:16         ` Xu, Ting
2020-07-22  2:16 ` [dpdk-stable] [PATCH v4] " Ting Xu
2020-07-22  8:26   ` Dumitrescu, Cristian
2020-07-22  8:30     ` Xu, Ting
2020-07-22  8:49       ` Dumitrescu, Cristian
2020-07-22  8:48   ` Dumitrescu, Cristian
2020-07-29 12:01   ` [dpdk-stable] [dpdk-dev] " David Marchand
2020-07-29 13:13     ` Dumitrescu, Cristian
2020-07-29 13:28       ` David Marchand
2020-07-29 13:54         ` Dumitrescu, Cristian
2020-07-29 13:59           ` David Marchand
2020-07-29 14:53             ` Dumitrescu, Cristian
2020-07-30  6:57               ` Xu, Ting
2020-07-30 10:35         ` Kevin Traynor
2020-09-09  6:18           ` Xu, Ting
2020-09-15  8:03             ` David Marchand
2020-10-14  8:26               ` Xu, Ting
2020-10-14 13:53   ` David Marchand
2020-07-09  1:44 [dpdk-stable] [PATCH v3] " Ting Xu

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