From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-f65.google.com (mail-ed1-f65.google.com [209.85.208.65]) by dpdk.org (Postfix) with ESMTP id 35E755F16 for ; Tue, 10 Jul 2018 11:34:15 +0200 (CEST) Received: by mail-ed1-f65.google.com with SMTP id i20-v6so3055696eds.12 for ; Tue, 10 Jul 2018 02:34:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=netronome-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=3UEqH4F/lELE/jqr7I7cHjlLpAnqaFPyncuJmhSSpSc=; b=deA7T4cqpcKOvKp1agGdSqr+rrZRhndrpbANv9M2FTENekCF3zrb24zW0ZgcDsayvx VE+WWhH59X3N67XLE9jbydwWSeSlzNn9t1QXmzYxnHpvU5ZvoR8DgUBKu2ZoXJWHRAAV ptOEapI1Valw096kVKkto5CZh+X1ZkBs9XTB1FKvO8iwwA48Tj9b0FPm2cruJ++dH0sc Lw7SKpraCNWw95TY/WhA4YCVC9sBDRRIUIUn0Soixsnm/wnBbkmWCbAgZt9zb39+V0/R 2mf8PsI9lFni/viUKYHCjfKgIJigxiJ3/xL6M7p/2v7Ednh6k2jSP4ag8tqyVh+z16hp WwYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=3UEqH4F/lELE/jqr7I7cHjlLpAnqaFPyncuJmhSSpSc=; b=gdc2vWiDS2IwEeuUhBsIrVZmqEtHZ5MfVQNq2T5h/j37QFnAYZXgYy3zIzLh9jdSgI wWraO02YWTu0OPgIl7C4CbW8mVuOXjqxoVMsS58wE4LhwVunF52sxvlptL8YIvaOWq6R toEW+LntcnSLhKQkaIkcSBUmnIpzfu69J1f/tGQYIBYj+sp5V1ba0rpKMplx8h3jX7Io DGn11Xkte+G2RIhA0F0t8g6fSde/VVPRw8OcwiEkan9CqZUqQJbpqsNVCOSZ/4qQSUH/ 7t2Lr+chTVc6iWC3Lreifs3JWfmqKEAh3GSSh80DNmH92TkEztiyR9DCe30pHZwkckV7 LD6A== X-Gm-Message-State: APt69E2pt/wXuX75F98SKmeQsgZ41Z/h+Hs+JfIOIHsKeG9HflcVR1RC wbgq3ipBc8O+OiATbzt4hEPQgeyJ+Dmho/2XbUTKYQ== X-Google-Smtp-Source: AAOMgpfoltGAW3LwONQuqZLcuMvlux3LlIjG2GH0WR8DtV72UPZhbeSNFSks35bSFw3q5/Juk9VNlcXquluIBL7Ug+Y= X-Received: by 2002:a50:f098:: with SMTP id v24-v6mr26063886edl.90.1531215255009; Tue, 10 Jul 2018 02:34:15 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a50:b194:0:0:0:0:0 with HTTP; Tue, 10 Jul 2018 02:34:14 -0700 (PDT) In-Reply-To: References: <1530708838-2682-1-git-send-email-alejandro.lucero@netronome.com> <1530708838-2682-2-git-send-email-alejandro.lucero@netronome.com> From: Alejandro Lucero Date: Tue, 10 Jul 2018 10:34:14 +0100 Message-ID: To: Eelco Chaudron Cc: dev , stable@dpdk.org, "Burakov, Anatoly" , Maxime Coquelin , Ferruh Yigit Content-Type: text/plain; charset="UTF-8" X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-stable] [PATCH v3 1/6] mem: add function for checking memsegs IOVAs addresses X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Jul 2018 09:34:15 -0000 On Tue, Jul 10, 2018 at 9:56 AM, Eelco Chaudron wrote: > > > On 4 Jul 2018, at 14:53, Alejandro Lucero wrote: > > A device can suffer addressing limitations. This functions checks >> memsegs have iovas within the supported range based on dma mask. >> >> PMD should use this during initialization if supported devices >> suffer addressing limitations, returning an error if this function >> returns memsegs out of range. >> >> Another potential usage is for emulated IOMMU hardware with addressing >> limitations. >> >> Signed-off-by: Alejandro Lucero >> Acked-by: Anatoly Burakov >> --- >> lib/librte_eal/common/eal_common_memory.c | 33 >> ++++++++++++++++++++++++++++++ >> lib/librte_eal/common/include/rte_memory.h | 3 +++ >> lib/librte_eal/rte_eal_version.map | 1 + >> 3 files changed, 37 insertions(+) >> >> diff --git a/lib/librte_eal/common/eal_common_memory.c >> b/lib/librte_eal/common/eal_common_memory.c >> index fc6c44d..f5efebe 100644 >> --- a/lib/librte_eal/common/eal_common_memory.c >> +++ b/lib/librte_eal/common/eal_common_memory.c >> @@ -109,6 +109,39 @@ >> } >> } >> >> +/* check memseg iovas are within the required range based on dma mask */ >> +int >> +rte_eal_check_dma_mask(uint8_t maskbits) >> +{ >> + >> + const struct rte_mem_config *mcfg; >> + uint64_t mask; >> + int i; >> + >> > > I think we should add some sanity check to the input maskbits, i.e. [64,0) > or [64, 32]? What would be a reasonable lower bound. > > This is not a user's API, so any invocation will be reviewed, but I guess adding a sanity check here does not harm. Not sure about lower bound but upper should 64, although it does not make sense but it is safe. Lower bound is not so problematic. > > + /* create dma mask */ >> + mask = ~((1ULL << maskbits) - 1); >> + >> + /* get pointer to global configuration */ >> + mcfg = rte_eal_get_configuration()->mem_config; >> + >> + for (i = 0; i < RTE_MAX_MEMSEG; i++) { >> + if (mcfg->memseg[i].addr == NULL) >> + break; >> + >> + if (mcfg->memseg[i].iova & mask) { >> + RTE_LOG(INFO, EAL, >> + "memseg[%d] iova %"PRIx64" out of >> range:\n", >> + i, mcfg->memseg[i].iova); >> + >> + RTE_LOG(INFO, EAL, "\tusing dma mask %"PRIx64"\n", >> + mask); >> + return -1; >> + } >> + } >> + >> + return 0; >> +} >> + >> /* return the number of memory channels */ >> unsigned rte_memory_get_nchannel(void) >> { >> diff --git a/lib/librte_eal/common/include/rte_memory.h >> b/lib/librte_eal/common/include/rte_memory.h >> index 80a8fc0..b2a0168 100644 >> --- a/lib/librte_eal/common/include/rte_memory.h >> +++ b/lib/librte_eal/common/include/rte_memory.h >> @@ -209,6 +209,9 @@ struct rte_memseg { >> */ >> unsigned rte_memory_get_nrank(void); >> >> +/* check memsegs iovas are within a range based on dma mask */ >> +int rte_eal_check_dma_mask(uint8_t maskbits); >> + >> /** >> * Drivers based on uio will not load unless physical >> * addresses are obtainable. It is only possible to get >> diff --git a/lib/librte_eal/rte_eal_version.map >> b/lib/librte_eal/rte_eal_version.map >> index f4f46c1..aa6cf87 100644 >> --- a/lib/librte_eal/rte_eal_version.map >> +++ b/lib/librte_eal/rte_eal_version.map >> @@ -184,6 +184,7 @@ DPDK_17.11 { >> >> rte_eal_create_uio_dev; >> rte_bus_get_iommu_class; >> + rte_eal_check_dma_mask; >> rte_eal_has_pci; >> rte_eal_iova_mode; >> rte_eal_mbuf_default_mempool_ops; >> -- >> 1.9.1 >> >