From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CD9A543C0F for ; Fri, 1 Mar 2024 17:14:17 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C3AD54338E; Fri, 1 Mar 2024 17:14:17 +0100 (CET) Received: from mail-oo1-f54.google.com (mail-oo1-f54.google.com [209.85.161.54]) by mails.dpdk.org (Postfix) with ESMTP id 7B1E9432E0 for ; Fri, 1 Mar 2024 17:14:15 +0100 (CET) Received: by mail-oo1-f54.google.com with SMTP id 006d021491bc7-59fd6684316so831353eaf.0 for ; Fri, 01 Mar 2024 08:14:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iol.unh.edu; s=unh-iol; t=1709309655; x=1709914455; darn=dpdk.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=ZQah4ltcT9iTUT1fMl8Z5yrnRDqQtN+L2mEDS3cQNno=; b=PywM4lXQPqNN/D3JljckXxxOS3W6lsfrgcdYxAVBkyP6bZYbB1JtqsMdD7BsEPeKyS Z97/WKGb4VOBoJl+VVhucKM40zxE4kQJvJr+FlPStoPimdCzY6viX3WTBe7KHX9vachF Ff/8UupEJCXPhJ5SDNqk5di3G3OwFgzXg1DcU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709309655; x=1709914455; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ZQah4ltcT9iTUT1fMl8Z5yrnRDqQtN+L2mEDS3cQNno=; b=JvH8REo/Z7KpLwQLR0qHH2yEJ43UoI+gRfVFrIgjIlSFgs2J+3x8e6Pjhsq/cOkn+E HP1tXNA/I2KfH5vmnlOK2j6fWk9V7ElVQs2kcABcwa4M8vufWqEzqGxaZPrT6B71A3Cl xMhf2vAgQCCK/rBIFzXMAY12ArOr6NYu07WOdwu4qvJm6reoqxcjNxeoNFXg+INk/Gym B6B471qlSDU0u37N3d4OKYtDO2Pr9lVhJhJ97Cv+blJ5RZl/kod1RkLhq5kWQODnybkr nI6Qne/0jVfeT3SGXpcEgKXefdbvOJQxBElHAffE+CGE6z+Dy65fcyvKWUO8xJYy9Ki7 8rWw== X-Forwarded-Encrypted: i=1; AJvYcCXZAubXQyJaVsHO8iCLEXm08sBCWe6sLlrbTKRIHZDgSWjlpb2D5lwzoActWQTVvOtnpvclE2RQ8UhfMUapGMI= X-Gm-Message-State: AOJu0YyZ6tcDp3XpYSlD0UuTrI9tYJKs18hyg/aLl4tv83V7CtYLGY8Z QnfX0d/ksEyaJmz2yXAh8JekdznUM+gll2B04xqe3RA23rEB2fEDZhX96UJY9yOlxMU6RJTIDFg lKbegJsM0tAWhSkjCxtv/eY1Yj2Gz2qQYeLdtvQ== X-Google-Smtp-Source: AGHT+IEFxI3evUltc2wseJCAt3qrUdnmPUh10jcqYtTH+SbapLxevGEIYPWO+abHStCHudMMHT6fUWfljT/BN/OOAKo= X-Received: by 2002:a4a:3111:0:b0:5a0:ea46:fff5 with SMTP id k17-20020a4a3111000000b005a0ea46fff5mr1905810ooa.5.1709309654864; Fri, 01 Mar 2024 08:14:14 -0800 (PST) MIME-Version: 1.0 References: <20240301084605.1652351-1-shunh@nvidia.com> In-Reply-To: <20240301084605.1652351-1-shunh@nvidia.com> From: Patrick Robb Date: Fri, 1 Mar 2024 11:14:04 -0500 Message-ID: Subject: Re: [PATCH] net/mlx5: set correct priority for meter policy To: Shun Hao Cc: viacheslavo@nvidia.com, matan@nvidia.com, orika@nvidia.com, Suanming Mou , Bing Zhao , dev@dpdk.org, rasland@nvidia.com, stable@dpdk.org Content-Type: multipart/alternative; boundary="000000000000ca295a06129baa91" X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org --000000000000ca295a06129baa91 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable The Community CI Testing Lab had an infra failure this morning and some patches including yours were affected with false failures. The issue is now resolved and we are rerunning the tests in question for all patches submitted today. On Fri, Mar 1, 2024 at 3:46=E2=80=AFAM Shun Hao wrote: > Currently a meter policy's flows are always using the same priority for > all colors, so the red color flow might be before green/yellow ones. > This will impact the performance cause green/yellow packets will check > red flow first and got miss, then match green/yellow flows, introducing > more hops. > > This patch fixes this by giving the same priority to flows for all > colors. > > Fixes: 363db9b00f ("net/mlx5: handle yellow case in default meter policy"= ) > CC: stable@dpdk.org > > Signed-off-by: Shun Hao > Acked-by: Bing Zhao > Acked-by: Matan Azrad > --- > drivers/net/mlx5/mlx5_flow_dv.c | 41 +++++++++++++++++++-------------- > 1 file changed, 24 insertions(+), 17 deletions(-) > > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > b/drivers/net/mlx5/mlx5_flow_dv.c > index 18f09b22be..f1584ed6e0 100644 > --- a/drivers/net/mlx5/mlx5_flow_dv.c > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > @@ -17922,9 +17922,8 @@ __flow_dv_create_policy_matcher(struct rte_eth_de= v > *dev, > } > } > tbl_data =3D container_of(tbl_rsc, struct mlx5_flow_tbl_data_entr= y, > tbl); > - if (priority < RTE_COLOR_RED) > - flow_dv_match_meta_reg(matcher.mask.buf, > - (enum modify_reg)color_reg_c_idx, color_mask, > color_mask); > + flow_dv_match_meta_reg(matcher.mask.buf, > + (enum modify_reg)color_reg_c_idx, color_mask, color_mask)= ; > matcher.priority =3D priority; > matcher.crc =3D rte_raw_cksum((const void *)matcher.mask.buf, > matcher.mask.size); > @@ -17975,7 +17974,6 @@ __flow_dv_create_domain_policy_rules(struct > rte_eth_dev *dev, > int i; > int ret =3D mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_er= r); > struct mlx5_sub_policy_color_rule *color_rule; > - bool svport_match; > struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] =3D {NUL= L}; > > if (ret < 0) > @@ -18011,10 +18009,9 @@ __flow_dv_create_domain_policy_rules(struct > rte_eth_dev *dev, > /* No use. */ > attr.priority =3D i; > /* Create matchers for colors. */ > - svport_match =3D (i !=3D RTE_COLOR_RED) ? match_src_port = : > false; > if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx, > MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy, > - &attr, svport_match, NULL, > + &attr, match_src_port, NULL, > &color_rule->matcher, &flow_err)) { > DRV_LOG(ERR, "Failed to create color%u matcher.", > i); > goto err_exit; > @@ -18024,7 +18021,7 @@ __flow_dv_create_domain_policy_rules(struct > rte_eth_dev *dev, > color_reg_c_idx, (enum rte_color)i, > color_rule->matcher, > acts[i].actions_n, acts[i].dv_actions, > - svport_match, NULL, &color_rule->rule, > + match_src_port, NULL, &color_rule->rule, > &attr)) { > DRV_LOG(ERR, "Failed to create color%u rule.", i)= ; > goto err_exit; > @@ -18907,7 +18904,7 @@ flow_dv_meter_hierarchy_rule_create(struct > rte_eth_dev *dev, > struct { > struct mlx5_flow_meter_policy *fm_policy; > struct mlx5_flow_meter_info *next_fm; > - struct mlx5_sub_policy_color_rule > *tag_rule[MLX5_MTR_RTE_COLORS]; > + struct mlx5_sub_policy_color_rule *tag_rule[RTE_COLORS]; > } fm_info[MLX5_MTR_CHAIN_MAX_NUM] =3D { {0} }; > uint32_t fm_cnt =3D 0; > uint32_t i, j; > @@ -18941,14 +18938,22 @@ flow_dv_meter_hierarchy_rule_create(struct > rte_eth_dev *dev, > mtr_policy =3D fm_info[i].fm_policy; > rte_spinlock_lock(&mtr_policy->sl); > sub_policy =3D mtr_policy->sub_policys[domain][0]; > - for (j =3D 0; j < MLX5_MTR_RTE_COLORS; j++) { > + for (j =3D 0; j < RTE_COLORS; j++) { > uint8_t act_n =3D 0; > - struct mlx5_flow_dv_modify_hdr_resource > *modify_hdr; > + struct mlx5_flow_dv_modify_hdr_resource > *modify_hdr =3D NULL; > struct mlx5_flow_dv_port_id_action_resource > *port_action; > + uint8_t fate_action; > > - if (mtr_policy->act_cnt[j].fate_action !=3D > MLX5_FLOW_FATE_MTR && > - mtr_policy->act_cnt[j].fate_action !=3D > MLX5_FLOW_FATE_PORT_ID) > - continue; > + if (j =3D=3D RTE_COLOR_RED) { > + fate_action =3D MLX5_FLOW_FATE_DROP; > + } else { > + fate_action =3D > mtr_policy->act_cnt[j].fate_action; > + modify_hdr =3D > mtr_policy->act_cnt[j].modify_hdr; > + if (fate_action !=3D MLX5_FLOW_FATE_MTR &= & > + fate_action !=3D MLX5_FLOW_FATE_PORT_= ID > && > + fate_action !=3D MLX5_FLOW_FATE_DROP) > + continue; > + } > color_rule =3D mlx5_malloc(MLX5_MEM_ZERO, > sizeof(struct > mlx5_sub_policy_color_rule), > 0, SOCKET_ID_ANY); > @@ -18960,9 +18965,8 @@ flow_dv_meter_hierarchy_rule_create(struct > rte_eth_dev *dev, > goto err_exit; > } > color_rule->src_port =3D src_port; > - modify_hdr =3D mtr_policy->act_cnt[j].modify_hdr; > /* Prepare to create color rule. */ > - if (mtr_policy->act_cnt[j].fate_action =3D=3D > MLX5_FLOW_FATE_MTR) { > + if (fate_action =3D=3D MLX5_FLOW_FATE_MTR) { > next_fm =3D fm_info[i].next_fm; > if (mlx5_flow_meter_attach(priv, next_fm, > &attr, error)) { > mlx5_free(color_rule); > @@ -18989,7 +18993,7 @@ flow_dv_meter_hierarchy_rule_create(struct > rte_eth_dev *dev, > } > acts.dv_actions[act_n++] =3D > tbl_data->jump.action; > acts.actions_n =3D act_n; > - } else { > + } else if (fate_action =3D=3D MLX5_FLOW_FATE_PORT= _ID) { > port_action =3D > > mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], > > mtr_policy->act_cnt[j].rix_port_id_action); > @@ -19002,6 +19006,9 @@ flow_dv_meter_hierarchy_rule_create(struct > rte_eth_dev *dev, > acts.dv_actions[act_n++] =3D > modify_hdr->action; > acts.dv_actions[act_n++] =3D > port_action->action; > acts.actions_n =3D act_n; > + } else { > + acts.dv_actions[act_n++] =3D > mtr_policy->dr_drop_action[domain]; > + acts.actions_n =3D act_n; > } > fm_info[i].tag_rule[j] =3D color_rule; > TAILQ_INSERT_TAIL(&sub_policy->color_rules[j], > color_rule, next_port); > @@ -19033,7 +19040,7 @@ flow_dv_meter_hierarchy_rule_create(struct > rte_eth_dev *dev, > mtr_policy =3D fm_info[i].fm_policy; > rte_spinlock_lock(&mtr_policy->sl); > sub_policy =3D mtr_policy->sub_policys[domain][0]; > - for (j =3D 0; j < MLX5_MTR_RTE_COLORS; j++) { > + for (j =3D 0; j < RTE_COLORS; j++) { > color_rule =3D fm_info[i].tag_rule[j]; > if (!color_rule) > continue; > -- > 2.20.0 > > --000000000000ca295a06129baa91 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: base64 PGRpdiBkaXI9Imx0ciI+PGRpdiBkaXI9Imx0ciI+VGhlIENvbW11bml0eSBDSSBUZXN0aW5nIExh YiBoYWQgYW4gaW5mcmEgZmFpbHVyZSB0aGlzIG1vcm5pbmcgYW5kIHNvbWUgcGF0Y2hlcyBpbmNs dWRpbmcgeW91cnMgd2VyZSBhZmZlY3RlZCB3aXRoIGZhbHNlIGZhaWx1cmVzLiBUaGUgaXNzdWUg aXMgbm93IHJlc29sdmVkIGFuZCB3ZSBhcmUgcmVydW5uaW5nIHRoZSB0ZXN0cyBpbiBxdWVzdGlv biBmb3IgYWxsIHBhdGNoZXMgc3VibWl0dGVkIHRvZGF5LsKgPGJyPjwvZGl2Pjxicj48ZGl2IGNs YXNzPSJnbWFpbF9xdW90ZSI+PGRpdiBkaXI9Imx0ciIgY2xhc3M9ImdtYWlsX2F0dHIiPk9uIEZy aSwgTWFyIDEsIDIwMjQgYXQgMzo0NuKAr0FNIFNodW4gSGFvICZsdDs8YSBocmVmPSJtYWlsdG86 c2h1bmhAbnZpZGlhLmNvbSI+c2h1bmhAbnZpZGlhLmNvbTwvYT4mZ3Q7IHdyb3RlOjxicj48L2Rp dj48YmxvY2txdW90ZSBjbGFzcz0iZ21haWxfcXVvdGUiIHN0eWxlPSJtYXJnaW46MHB4IDBweCAw cHggMC44ZXg7Ym9yZGVyLWxlZnQ6MXB4IHNvbGlkIHJnYigyMDQsMjA0LDIwNCk7cGFkZGluZy1s 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