From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 72B95432EB for ; Thu, 9 Nov 2023 22:42:32 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6C95C402E7; Thu, 9 Nov 2023 22:42:32 +0100 (CET) Received: from mail-yb1-f173.google.com (mail-yb1-f173.google.com [209.85.219.173]) by mails.dpdk.org (Postfix) with ESMTP id D362E402CC for ; Thu, 9 Nov 2023 22:42:31 +0100 (CET) Received: by mail-yb1-f173.google.com with SMTP id 3f1490d57ef6-da41e70e334so1447544276.3 for ; Thu, 09 Nov 2023 13:42:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699566151; x=1700170951; darn=dpdk.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=5Wjq9VHJ8kxkm9DRlydawOgJ+8WpKRS/LV3b/AqQApY=; b=MAOvUDy473h+BRSePHjHLfznjrl74A3rbQFnV6GvlMrVd92zixvq2fs9av03E5YWEK e5b/xamKfc510vAwnu6oOjr8UnSVPFKTIUjf2ynMLhFgd7AQtBVwL6nsyoxNglYzTC0B c0kMlHBWCFPkyE2yVkCm2R/0z0EZg7LCheVwULT+jsA1ef0EayDPDXJfKwEvwfQG4RJ8 eUHK4te0IhVImsmE0HttQcMYrRN1oGbxGItJf6zt9rYvTU3w8q2jkVYsjFLT4hsKcy2p SDl3Z5AC+KDo0IOHRj+muTHPlewyb+gKFH7i4IckHRMRKDYqeGvqgp+ymfzX6GPMX/s5 iepg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699566151; x=1700170951; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=5Wjq9VHJ8kxkm9DRlydawOgJ+8WpKRS/LV3b/AqQApY=; b=lWc6way7hjEcdvcgjv2x7r87DiRZ2mo9RQwcGXSNBcdoe9P3AQGrIrbD87QRjiqBwP vOpVNLxcvUxr+H1hFFOubE2sdSbsCq7f15y2Kz869+SOe5usTyLlr6Hs52w+KTwtlPef u0FSyYI0Py2XnS0aKvOSgghUu7P+gh+CIkOUndTTxWObONOC7OSYI4LZ1iHrGoZUegAM vSiGP19UumoZ3zn4ZtFdmq5EFugZDnuGQ7NrafEurRKj/rNmAqOAhmR3SnaxcWU/pqnP 8ynmv/LQKmvB2JEjOBCOex7uiYQnUh3GWhY+AtYcU6GhHYJ2m7OnONaoOX0QZIyCRKHb 7FTQ== X-Gm-Message-State: AOJu0YwctmX6g1DD6o6230DkiBlGKPjmY2Pd+BBdPTwky6/kbhqAvBKu gGGQR4i0YRpQzEF+WlbEgSndCExhT9lGYoR7i267QLOPJog= X-Google-Smtp-Source: AGHT+IGhVkEIPEap9xn0PLMnSD+CbstOvJpM7VUdPilq7Kv5rGYZbjEzGpuhizzdgN5RaUFLBhIkjMnvxPZzsYW6tBg= X-Received: by 2002:a25:da97:0:b0:da0:5775:fd56 with SMTP id n145-20020a25da97000000b00da05775fd56mr5790133ybf.36.1699566151075; Thu, 09 Nov 2023 13:42:31 -0800 (PST) MIME-Version: 1.0 References: <20231109194544.3246038-1-abdullah.sevincer@intel.com> In-Reply-To: <20231109194544.3246038-1-abdullah.sevincer@intel.com> From: Luca Boccassi Date: Thu, 9 Nov 2023 21:42:19 +0000 Message-ID: Subject: Re: [PATCH 22.11] event/dlb2: fix disable PASID To: Abdullah Sevincer Cc: stable@dpdk.org Content-Type: text/plain; charset="UTF-8" X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org On Thu, 9 Nov 2023 at 19:46, Abdullah Sevincer wrote: > > [ upstream commit 5a6878335b8179337ec2d9931debf1f46525e8fc ] > > In vfio-pci driver when PASID is enabled by default DLB hardware puts > DLB in SIOV mode. This breaks DLB PF-PMD mode. For DLB PF-PMD mode to > function properly PASID needs to be disabled. > > In this commit this issue is addressed and PASID is disabled by writing > a zero to PASID control register. > > Fixes: 5433956d5185 ("event/dlb2: add eventdev probe") > > Signed-off-by: Abdullah Sevincer > --- > drivers/event/dlb2/pf/dlb2_main.c | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c > index 717aa4fc08..63868e2388 100644 > --- a/drivers/event/dlb2/pf/dlb2_main.c > +++ b/drivers/event/dlb2/pf/dlb2_main.c > @@ -46,6 +46,7 @@ > #define DLB2_PCI_CAP_ID_MSIX 0x11 > #define DLB2_PCI_EXT_CAP_ID_PRI 0x13 > #define DLB2_PCI_EXT_CAP_ID_ACS 0xD > +#define DLB2_PCI_EXT_CAP_ID_PASID 0x1B /* Process Address Space ID */ > > #define DLB2_PCI_PRI_CTRL_ENABLE 0x1 > #define DLB2_PCI_PRI_ALLOC_REQ 0xC > @@ -64,6 +65,8 @@ > #define DLB2_PCI_ACS_CR 0x8 > #define DLB2_PCI_ACS_UF 0x10 > #define DLB2_PCI_ACS_EC 0x20 > +#define DLB2_PCI_PASID_CTRL 0x06 /* PASID control register */ > +#define DLB2_PCI_PASID_CAP_OFFSET 0x148 /* PASID capability offset */ > > static int dlb2_pci_find_capability(struct rte_pci_device *pdev, uint32_t id) > { > @@ -257,12 +260,14 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > uint16_t rt_ctl_word; > uint32_t pri_reqs_dword; > uint16_t pri_ctrl_word; > + uint16_t pasid_ctrl; > > int pcie_cap_offset; > int pri_cap_offset; > int msix_cap_offset; > int err_cap_offset; > int acs_cap_offset; > + int pasid_cap_offset; > int wait_count; > > uint16_t devsta_busy_word; > @@ -582,6 +587,28 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > } > } > > + /* The current Linux kernel vfio driver does not expose PASID capability to > + * users. It also enables PASID by default, which breaks DLB PF PMD. We have > + * to use the hardcoded offset for now to disable PASID. > + */ > + pasid_cap_offset = DLB2_PCI_PASID_CAP_OFFSET; > + > + off = pasid_cap_offset + DLB2_PCI_PASID_CTRL; > + if (rte_pci_read_config(pdev, &pasid_ctrl, 2, off) != 2) > + pasid_ctrl = 0; > + > + if (pasid_ctrl) { > + DLB2_INFO(dlb2_dev, "DLB2 disabling pasid...\n"); > + > + pasid_ctrl = 0; > + ret = rte_pci_write_config(pdev, &pasid_ctrl, 2, off); > + if (ret != 2) { > + DLB2_LOG_ERR("[%s()] failed to write the pcie config space at offset %d\n", > + __func__, (int)off); > + return ret; > + } > + } > + > return 0; > } Applied to 20.11