* [PATCH] net/mlx5: fix internal SQ item definition
@ 2024-10-27 14:09 Gregory Etelson
2024-10-28 13:17 ` Raslan Darawsheh
0 siblings, 1 reply; 2+ messages in thread
From: Gregory Etelson @ 2024-10-27 14:09 UTC (permalink / raw)
To: dev
Cc: getelson, ,
rasland, stable, Dariusz Sosnowski, Viacheslav Ovsiienko,
Bing Zhao, Ori Kam, Suanming Mou, Matan Azrad
When DPDK copies flow items with the `rte_flow_conv` call, it assumes
that size of PMD private data has pointer size - see patch [1]
MLX5 PMD defined `struct mlx5_rte_flow_item_sq` as 32 bits.
As the result, on 64 bits systems, when DPDK copied
MLX5_RTE_FLOW_ITEM_TYPE_SQ item, the target buffer was assigned
additional 32 bits.
The patch expands size of `struct mlx5_rte_flow_item_sq` to 64 bits
on 64 bits systems.
[1]:
commit 6cf72047332b ("ethdev: support flow elements with variable length")
Fixes: 75a00812b18f ("net/mlx5: add hardware steering item translation")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/mlx5_flow.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index db56ae051d..9cf54c3a6a 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -168,6 +168,9 @@ struct mlx5_flow_action_copy_mreg {
/* Matches on source queue. */
struct mlx5_rte_flow_item_sq {
uint32_t queue; /* DevX SQ number */
+#ifdef RTE_ARCH_64
+ uint32_t reserved;
+#endif
};
/* Map from registers to modify fields. */
--
2.43.0
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] net/mlx5: fix internal SQ item definition
2024-10-27 14:09 [PATCH] net/mlx5: fix internal SQ item definition Gregory Etelson
@ 2024-10-28 13:17 ` Raslan Darawsheh
0 siblings, 0 replies; 2+ messages in thread
From: Raslan Darawsheh @ 2024-10-28 13:17 UTC (permalink / raw)
To: Gregory Etelson, dev
Cc: Maayan Kashani, stable, Dariusz Sosnowski, Slava Ovsiienko,
Bing Zhao, Ori Kam, Suanming Mou, Matan Azrad
Hi,
From: Gregory Etelson <getelson@nvidia.com>
Sent: Sunday, October 27, 2024 4:09 PM
To: dev@dpdk.org
Cc: Gregory Etelson; Maayan Kashani; Raslan Darawsheh; stable@dpdk.org; Dariusz Sosnowski; Slava Ovsiienko; Bing Zhao; Ori Kam; Suanming Mou; Matan Azrad
Subject: [PATCH] net/mlx5: fix internal SQ item definition
When DPDK copies flow items with the `rte_flow_conv` call, it assumes
that size of PMD private data has pointer size - see patch [1]
MLX5 PMD defined `struct mlx5_rte_flow_item_sq` as 32 bits.
As the result, on 64 bits systems, when DPDK copied
MLX5_RTE_FLOW_ITEM_TYPE_SQ item, the target buffer was assigned
additional 32 bits.
The patch expands size of `struct mlx5_rte_flow_item_sq` to 64 bits
on 64 bits systems.
[1]:
commit 6cf72047332b ("ethdev: support flow elements with variable length")
Fixes: 75a00812b18f ("net/mlx5: add hardware steering item translation")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
^ permalink raw reply [flat|nested] 2+ messages in thread
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