RE: [EXT] Re: [PATCH v2 1/5] examples/l3fwd: fix port group mask generation

[Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>]

> On 9/2/22 2:18 AM, pbhagavatula@marvell.com wrote:
> > From: Pavan Nikhilesh <pbhagavatula@marvell.com>
> >
> > Fix port group mask generation in altivec, vec_any_eq returns
> > 0 or 1 while port_groupx4 expects comparison mask result.
> >
> > Fixes: 2193b7467f7a ("examples/l3fwd: optimize packet processing on
> powerpc")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> > ---
> >   v2 Changes:
> >   - Fix PPC, RISC-V, aarch32 compilation.
> >
> >   examples/common/altivec/port_group.h | 11 +++++++++--
> >   1 file changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/examples/common/altivec/port_group.h
> b/examples/common/altivec/port_group.h
> > index 5e209b02fa..592ef80b7f 100644
> > --- a/examples/common/altivec/port_group.h
> > +++ b/examples/common/altivec/port_group.h
> > @@ -26,12 +26,19 @@ port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t
> *lp,
> >   		uint16_t u16[FWDSTEP + 1];
> >   		uint64_t u64;
> >   	} *pnum = (void *)pn;
> > +	union u_vec {
> > +		__vector unsigned short v_us;
> > +		unsigned short s[8];
> > +	};
> >
> > +	union u_vec res;
> >   	int32_t v;
> >
> > -	v = vec_any_eq(dp1, dp2);
> > -
> > +	dp1 = (__vector unsigned short)vec_cmpeq(dp1, dp2);
> 
> Altivec vec_cmpeq() is similar to Intel _mm_cmpeq_*(), so this looks
> right to me.
> 
> > +	res.v_us = dp1;
> >
> > +	v = (res.s[0] & 0x1) | (res.s[1] & 0x2) | (res.s[2] & 0x4) |
> > +	    (res.s[3] & 0x8);
> 
> This can be vectorized too.  The Intel _mm_unpacklo_epi16() intrinsic
> can be replaced with the following Altivec code:
> 
> extern __inline __m128i __attribute__((__gnu_inline__,
> __always_inline__, __artificial__))
> _mm_unpacklo_epi16 (__m128i __A, __m128i __B)
> {
>    return (__m128i) vec_mergeh ((__v8hi)__A, (__v8hi)__B);
> }
> 
> The Intel _mm_movemask_ps() intrinsic can be replaced with the following
> Altivec implementation:
> 
> /* Creates a 4-bit mask from the most significant bits of the SPFP
> values.  */
> extern __inline int __attribute__((__gnu_inline__, __always_inline__,
> __artificial__))
> _mm_movemask_ps (__m128  __A)
> {
>    __vector unsigned long long result;
>    static const __vector unsigned int perm_mask =
>      {
> #ifdef __LITTLE_ENDIAN__
>          0x00204060, 0x80808080, 0x80808080, 0x80808080
> #else
>        0x80808080, 0x80808080, 0x80808080, 0x00204060
> #endif
>      };
> 
>    result = ((__vector unsigned long long)
>              vec_vbpermq ((__vector unsigned char) __A,
>                           (__vector unsigned char) perm_mask));
> 
> #ifdef __LITTLE_ENDIAN__
>    return result[1];
> #else
>    return result[0];
> #endif
> }
> 

Sure I will add this to the next version.

> Dave

Thanks, 
Pavan.