* [PATCH v1 1/3] net/ice: restrict testpmd to scalar path for TxPP [not found] <20251027182801.191295-1-soumyadeep.hore@intel.com> @ 2025-10-27 18:27 ` Soumyadeep Hore 2025-10-29 9:30 ` Loftus, Ciara 2025-10-27 18:28 ` [PATCH v1 2/3] net/ice: fix PTP clock corruption with TxPP Soumyadeep Hore ` (2 subsequent siblings) 3 siblings, 1 reply; 8+ messages in thread From: Soumyadeep Hore @ 2025-10-27 18:27 UTC (permalink / raw) To: dev, bruce.richardson Cc: rajesh3.kumar, aman.deep.singh, manoj.kumar.subbarao, stable ICE PMD supports TxPP feature only in scalar path. Hence restricted testpmd to scalar path when the feature is enabled. Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") Cc: stable@dpdk.org Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> --- drivers/net/intel/ice/ice_rxtx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c index fd0b3a7532..33d82cd46d 100644 --- a/drivers/net/intel/ice/ice_rxtx.c +++ b/drivers/net/intel/ice/ice_rxtx.c @@ -4103,8 +4103,11 @@ ice_set_tx_function(struct rte_eth_dev *dev) struct ci_tx_queue *txq; int i; int tx_check_ret = -1; + uint64_t offloads; - if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + offloads = dev->data->dev_conf.txmode.offloads; + if ((offloads & RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) == 0 && + rte_eal_process_type() == RTE_PROC_PRIMARY) { ad->tx_simd_width = RTE_VECT_SIMD_DISABLED; tx_check_ret = ice_tx_vec_dev_check(dev); ad->tx_simd_width = ice_get_max_simd_bitwidth(); -- 2.47.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH v1 1/3] net/ice: restrict testpmd to scalar path for TxPP 2025-10-27 18:27 ` [PATCH v1 1/3] net/ice: restrict testpmd to scalar path for TxPP Soumyadeep Hore @ 2025-10-29 9:30 ` Loftus, Ciara 0 siblings, 0 replies; 8+ messages in thread From: Loftus, Ciara @ 2025-10-29 9:30 UTC (permalink / raw) To: Hore, Soumyadeep, dev, Richardson, Bruce Cc: Kumar, Rajesh3, Singh, Aman Deep, Subbarao, Manoj Kumar, stable > > ICE PMD supports TxPP feature only in scalar path. Hence restricted > testpmd to scalar path when the feature is enabled. > > Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") > Cc: stable@dpdk.org > > Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> > --- > drivers/net/intel/ice/ice_rxtx.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c > index fd0b3a7532..33d82cd46d 100644 > --- a/drivers/net/intel/ice/ice_rxtx.c > +++ b/drivers/net/intel/ice/ice_rxtx.c > @@ -4103,8 +4103,11 @@ ice_set_tx_function(struct rte_eth_dev *dev) > struct ci_tx_queue *txq; > int i; > int tx_check_ret = -1; > + uint64_t offloads; > > - if (rte_eal_process_type() == RTE_PROC_PRIMARY) { > + offloads = dev->data->dev_conf.txmode.offloads; > + if ((offloads & RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) == 0 > && > + rte_eal_process_type() == RTE_PROC_PRIMARY) { > ad->tx_simd_width = RTE_VECT_SIMD_DISABLED; > tx_check_ret = ice_tx_vec_dev_check(dev); > ad->tx_simd_width = ice_get_max_simd_bitwidth(); > -- > 2.47.1 I think you can achieve the desired behaviour by adding RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP to ICE_TX_NO_VECTOR_FLAGS. Also you should remove the reference to testpmd in the commit message. The patch is just a change to the ice driver so should not reference any specific application. ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v1 2/3] net/ice: fix PTP clock corruption with TxPP [not found] <20251027182801.191295-1-soumyadeep.hore@intel.com> 2025-10-27 18:27 ` [PATCH v1 1/3] net/ice: restrict testpmd to scalar path for TxPP Soumyadeep Hore @ 2025-10-27 18:28 ` Soumyadeep Hore 2025-10-29 17:11 ` Bruce Richardson 2025-10-27 18:28 ` [PATCH v1 3/3] doc: update TxPP documentation Soumyadeep Hore [not found] ` <20251030173304.260209-1-soumyadeep.hore@intel.com> 3 siblings, 1 reply; 8+ messages in thread From: Soumyadeep Hore @ 2025-10-27 18:28 UTC (permalink / raw) To: dev, bruce.richardson Cc: rajesh3.kumar, aman.deep.singh, manoj.kumar.subbarao, stable On enabling TxPP PTP clock was getting corrupted as timesync was enabled on during setup. Currently timesync will be enabled during start of tx queue, hence enabling PHC clock to get updated on starting and stopping of ports. Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") Cc: stable@dpdk.org Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> --- drivers/net/intel/ice/ice_rxtx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c index 33d82cd46d..7473d45260 100644 --- a/drivers/net/intel/ice/ice_rxtx.c +++ b/drivers/net/intel/ice/ice_rxtx.c @@ -908,6 +908,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) rte_free(txq_elem); return err; } + dev->dev_ops->timesync_enable(dev); } else { txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx); @@ -1671,7 +1672,6 @@ ice_tx_queue_setup(struct rte_eth_dev *dev, PMD_INIT_LOG(ERR, "Cannot register Tx mbuf field/flag for timestamp"); return -EINVAL; } - dev->dev_ops->timesync_enable(dev); txq->tsq->nb_ts_desc = ice_calc_ts_ring_count(ICE_VSI_TO_HW(vsi), txq->nb_tx_desc); ring_size = sizeof(struct ice_ts_desc) * txq->tsq->nb_ts_desc; -- 2.47.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 2/3] net/ice: fix PTP clock corruption with TxPP 2025-10-27 18:28 ` [PATCH v1 2/3] net/ice: fix PTP clock corruption with TxPP Soumyadeep Hore @ 2025-10-29 17:11 ` Bruce Richardson 0 siblings, 0 replies; 8+ messages in thread From: Bruce Richardson @ 2025-10-29 17:11 UTC (permalink / raw) To: Soumyadeep Hore Cc: dev, rajesh3.kumar, aman.deep.singh, manoj.kumar.subbarao, stable On Mon, Oct 27, 2025 at 02:28:00PM -0400, Soumyadeep Hore wrote: > On enabling TxPP PTP clock was getting corrupted as timesync was enabled > on during setup. Currently timesync will be enabled during start of tx > queue, hence enabling PHC clock to get updated on starting and stopping > of ports. Can you clarify in a bit more detail, how did enabling the timesync during setup corrupt the clock, and how does enabling it only on start fix it? > > Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") > Cc: stable@dpdk.org > > Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> > --- > drivers/net/intel/ice/ice_rxtx.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c > index 33d82cd46d..7473d45260 100644 > --- a/drivers/net/intel/ice/ice_rxtx.c > +++ b/drivers/net/intel/ice/ice_rxtx.c > @@ -908,6 +908,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) > rte_free(txq_elem); > return err; > } > + dev->dev_ops->timesync_enable(dev); > } else { > txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx); > > @@ -1671,7 +1672,6 @@ ice_tx_queue_setup(struct rte_eth_dev *dev, > PMD_INIT_LOG(ERR, "Cannot register Tx mbuf field/flag for timestamp"); > return -EINVAL; > } > - dev->dev_ops->timesync_enable(dev); > > txq->tsq->nb_ts_desc = ice_calc_ts_ring_count(ICE_VSI_TO_HW(vsi), txq->nb_tx_desc); > ring_size = sizeof(struct ice_ts_desc) * txq->tsq->nb_ts_desc; > -- > 2.47.1 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v1 3/3] doc: update TxPP documentation [not found] <20251027182801.191295-1-soumyadeep.hore@intel.com> 2025-10-27 18:27 ` [PATCH v1 1/3] net/ice: restrict testpmd to scalar path for TxPP Soumyadeep Hore 2025-10-27 18:28 ` [PATCH v1 2/3] net/ice: fix PTP clock corruption with TxPP Soumyadeep Hore @ 2025-10-27 18:28 ` Soumyadeep Hore [not found] ` <20251030173304.260209-1-soumyadeep.hore@intel.com> 3 siblings, 0 replies; 8+ messages in thread From: Soumyadeep Hore @ 2025-10-27 18:28 UTC (permalink / raw) To: dev, bruce.richardson Cc: rajesh3.kumar, aman.deep.singh, manoj.kumar.subbarao, stable TxPP feature works only when DPDK library is compiled with PTP feature enabled and application is run on PF. Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") Cc: stable@dpdk.org Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> --- doc/guides/nics/ice.rst | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index 7e9ba23102..a15304fb34 100644 --- a/doc/guides/nics/ice.rst +++ b/doc/guides/nics/ice.rst @@ -457,6 +457,10 @@ This feature is currently supported only in E830 adapters. The flag ``RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP`` is used to enable the feature. In order to deliver timestamps internally ``set txtimes`` is used, where inter burst and intra burst time interval in nsecs is provided. + +Note that dpdk library should be compiled using PTP support enabled and testpmd +application should run on PF. + For example: .. code-block:: console -- 2.47.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <20251030173304.260209-1-soumyadeep.hore@intel.com>]
* [PATCH v2 1/3] net/ice: restrict ice PMD to scalar path for TxPP [not found] ` <20251030173304.260209-1-soumyadeep.hore@intel.com> @ 2025-10-30 17:33 ` Soumyadeep Hore 2025-10-30 17:33 ` [PATCH v2 2/3] net/ice: fix PTP clock corruption with TxPP Soumyadeep Hore 2025-10-30 17:33 ` [PATCH v2 3/3] doc: update TxPP documentation Soumyadeep Hore 2 siblings, 0 replies; 8+ messages in thread From: Soumyadeep Hore @ 2025-10-30 17:33 UTC (permalink / raw) To: dev, bruce.richardson Cc: rajesh3.kumar, aman.deep.singh, manoj.kumar.subbarao, ciara.loftus, stable ICE PMD supports TxPP feature only in scalar path. Hence restricted testpmd to scalar path when the feature is enabled. Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") Cc: stable@dpdk.org Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> --- drivers/net/intel/ice/ice_rxtx_vec_common.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/intel/ice/ice_rxtx_vec_common.h b/drivers/net/intel/ice/ice_rxtx_vec_common.h index a7cc4736cf..a24694c0b1 100644 --- a/drivers/net/intel/ice/ice_rxtx_vec_common.h +++ b/drivers/net/intel/ice/ice_rxtx_vec_common.h @@ -59,7 +59,8 @@ _ice_rx_queue_release_mbufs_vec(struct ci_rx_queue *rxq) RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO | \ RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO | \ RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO | \ - RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM) + RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM | \ + RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) #define ICE_TX_VECTOR_OFFLOAD ( \ RTE_ETH_TX_OFFLOAD_VLAN_INSERT | \ -- 2.47.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 2/3] net/ice: fix PTP clock corruption with TxPP [not found] ` <20251030173304.260209-1-soumyadeep.hore@intel.com> 2025-10-30 17:33 ` [PATCH v2 1/3] net/ice: restrict ice PMD to scalar path for TxPP Soumyadeep Hore @ 2025-10-30 17:33 ` Soumyadeep Hore 2025-10-30 17:33 ` [PATCH v2 3/3] doc: update TxPP documentation Soumyadeep Hore 2 siblings, 0 replies; 8+ messages in thread From: Soumyadeep Hore @ 2025-10-30 17:33 UTC (permalink / raw) To: dev, bruce.richardson Cc: rajesh3.kumar, aman.deep.singh, manoj.kumar.subbarao, ciara.loftus, stable On enabling TxPP PTP clock was getting corrupted as timesync was enabled on during setup. Currently timesync will be enabled during start of tx queue, hence enabling PHC clock to get updated on starting and stopping of ports. Earlier when timesync was enabled in tx queue setup, on stopping ports time will reset back to 0. Currently after every port restart PHC clock will be set to current system CLOCK_REALTIME. Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") Cc: stable@dpdk.org Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> --- drivers/net/intel/ice/ice_rxtx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c index fd0b3a7532..752e52b8cd 100644 --- a/drivers/net/intel/ice/ice_rxtx.c +++ b/drivers/net/intel/ice/ice_rxtx.c @@ -908,6 +908,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) rte_free(txq_elem); return err; } + dev->dev_ops->timesync_enable(dev); } else { txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx); @@ -1671,7 +1672,6 @@ ice_tx_queue_setup(struct rte_eth_dev *dev, PMD_INIT_LOG(ERR, "Cannot register Tx mbuf field/flag for timestamp"); return -EINVAL; } - dev->dev_ops->timesync_enable(dev); txq->tsq->nb_ts_desc = ice_calc_ts_ring_count(ICE_VSI_TO_HW(vsi), txq->nb_tx_desc); ring_size = sizeof(struct ice_ts_desc) * txq->tsq->nb_ts_desc; -- 2.47.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 3/3] doc: update TxPP documentation [not found] ` <20251030173304.260209-1-soumyadeep.hore@intel.com> 2025-10-30 17:33 ` [PATCH v2 1/3] net/ice: restrict ice PMD to scalar path for TxPP Soumyadeep Hore 2025-10-30 17:33 ` [PATCH v2 2/3] net/ice: fix PTP clock corruption with TxPP Soumyadeep Hore @ 2025-10-30 17:33 ` Soumyadeep Hore 2 siblings, 0 replies; 8+ messages in thread From: Soumyadeep Hore @ 2025-10-30 17:33 UTC (permalink / raw) To: dev, bruce.richardson Cc: rajesh3.kumar, aman.deep.singh, manoj.kumar.subbarao, ciara.loftus, stable TxPP feature works only when DPDK library is compiled with PTP feature enabled and application is run on PF. Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830") Cc: stable@dpdk.org Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> --- doc/guides/nics/ice.rst | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index 7e9ba23102..a15304fb34 100644 --- a/doc/guides/nics/ice.rst +++ b/doc/guides/nics/ice.rst @@ -457,6 +457,10 @@ This feature is currently supported only in E830 adapters. The flag ``RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP`` is used to enable the feature. In order to deliver timestamps internally ``set txtimes`` is used, where inter burst and intra burst time interval in nsecs is provided. + +Note that dpdk library should be compiled using PTP support enabled and testpmd +application should run on PF. + For example: .. code-block:: console -- 2.47.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
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[not found] <20251027182801.191295-1-soumyadeep.hore@intel.com>
2025-10-27 18:27 ` [PATCH v1 1/3] net/ice: restrict testpmd to scalar path for TxPP Soumyadeep Hore
2025-10-29 9:30 ` Loftus, Ciara
2025-10-27 18:28 ` [PATCH v1 2/3] net/ice: fix PTP clock corruption with TxPP Soumyadeep Hore
2025-10-29 17:11 ` Bruce Richardson
2025-10-27 18:28 ` [PATCH v1 3/3] doc: update TxPP documentation Soumyadeep Hore
[not found] ` <20251030173304.260209-1-soumyadeep.hore@intel.com>
2025-10-30 17:33 ` [PATCH v2 1/3] net/ice: restrict ice PMD to scalar path for TxPP Soumyadeep Hore
2025-10-30 17:33 ` [PATCH v2 2/3] net/ice: fix PTP clock corruption with TxPP Soumyadeep Hore
2025-10-30 17:33 ` [PATCH v2 3/3] doc: update TxPP documentation Soumyadeep Hore
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