From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E0BC3A0503 for ; Thu, 19 May 2022 11:56:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D883A40156; Thu, 19 May 2022 11:56:31 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 16E9D40156 for ; Thu, 19 May 2022 11:56:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652954190; x=1684490190; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=cUD4rnEe5aqIes+1T1QNMNa+a/X1t9vj3giNlzzUVbo=; b=g8BckoYhFobLAVdHOn2EEplxD7pha65FDvfkUCSk6pS4s25oQZpFw0dO CpfVFFWtyQvERYWvDsYN/YJlhJ0RI9wD3Em6KhE0jwqc+NzTOgtIBJg58 A1ijRom3jxLCkUQG5zKyw4ga9/Q1Wn8AlZFCtRsC+4qPqVgY2PVYy1VnK H2zKxcLvVi6g7viKt05t2dTcescAGEMtEiTqZw6Wm5PdnLo0VtF9EATNa NXWf7e8Z5xR2N3HY2uDIAqVEjvHTxhYO+IHD4NB48RU3lg05JuWXCqs/2 8B2Mg2iD/g/Os0uGjBdIqlW6Ds51yNDepXqNdYBB6ocqVmRcn6uINVeno A==; X-IronPort-AV: E=McAfee;i="6400,9594,10351"; a="358527973" X-IronPort-AV: E=Sophos;i="5.91,237,1647327600"; d="scan'208";a="358527973" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2022 02:56:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,237,1647327600"; d="scan'208";a="701089642" Received: from fmsmsx604.amr.corp.intel.com ([10.18.126.84]) by orsmga004.jf.intel.com with ESMTP; 19 May 2022 02:56:28 -0700 Received: from fmsmsx611.amr.corp.intel.com (10.18.126.91) by fmsmsx604.amr.corp.intel.com (10.18.126.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.27; Thu, 19 May 2022 02:56:28 -0700 Received: from fmsedg601.ED.cps.intel.com (10.1.192.135) by fmsmsx611.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.27 via Frontend Transport; Thu, 19 May 2022 02:56:28 -0700 Received: from NAM04-BN8-obe.outbound.protection.outlook.com (104.47.74.45) by edgegateway.intel.com (192.55.55.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2308.27; Thu, 19 May 2022 02:56:28 -0700 Received: from DM4PR11MB5994.namprd11.prod.outlook.com (2603:10b6:8:5d::20) by SN6PR11MB3535.namprd11.prod.outlook.com (2603:10b6:805:ce::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5250.18; Thu, 19 May 2022 09:56:25 +0000 Received: from DM4PR11MB5994.namprd11.prod.outlook.com ([fe80::b4f6:f68:2e31:ddf7]) by DM4PR11MB5994.namprd11.prod.outlook.com ([fe80::b4f6:f68:2e31:ddf7%7]) with mapi id 15.20.5273.014; Thu, 19 May 2022 09:56:25 +0000 From: "Zhang, Qi Z" To: "Zhang, Ke1X" , "Li, Xiaoyun" , "Wu, Jingjing" , "Xing, Beilei" , "dev@dpdk.org" CC: "Zhang, Ke1X" , "stable@dpdk.org" Subject: RE: [PATCH v2] net/iavf: fix Rx queue interrupt setting Thread-Topic: [PATCH v2] net/iavf: fix Rx queue interrupt setting Thread-Index: AQHYa2QmsEizh7am80G/OulDe1VgpK0l9aSQ Date: Thu, 19 May 2022 09:56:24 +0000 Message-ID: References: <20220425083628.81133-1-ke1x.zhang@intel.com> <20220519093031.256963-1-ke1x.zhang@intel.com> In-Reply-To: <20220519093031.256963-1-ke1x.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.6.401.20 dlp-product: dlpe-windows authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 24923b64-b9da-4033-58e3-08da397dd5f5 x-ms-traffictypediagnostic: SN6PR11MB3535:EE_ x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: MFogceUWdg1IH8KCMAt7wGYlTLTrcJ+NjBXNHQAGM+n7CyfYGNumYqzN8cZq7vMZWgwD36SY1q9Iar6WPxz9L8HNfT89WciEvMJRctD0V+CrdasaR2Wubosv4sFLdIrJGliW0GA7R8nkotvn30SyKpQf6MV4s4LxMoLZ5C1HS71yr+UpugPsBFYXwj3+/l6AKP+YVne0gmRvh7mwdBX/ZInSmeZI8v6KPAKUktlUvDY8tnbKO2jmmmIe2vWaP0StoQOr5GA1JIHefsbFxA+XLJxiWeZUHvxAPFyyUKid/3GVvDinOnCPhYxHuBchT9z2rWQDHRrJB1V1yMLiNY66og9roHity2iCY/ZoGlt7FLARJzZClnT76DUaR7oPecKlyAmdVWggOzWgpSt8KuIJiaXoCH/V/qrcLIImR8W1xWUPmThQza7gNi1pmQOokbZJmovdG99IU3Ce4aoHi3iqSfzwYvicVUlyTK2ImquOI9N6X2S0+RLGkdo61cGdVqFgE1gb/kVq9OqKbaAiAYT8FB67qADi8x9SCYy5zck4a1MR684eCv8ZjyC1of1+kyjTnf6ItgEMyYcCvSTAJFzMzRG+LQuqtesGEV6Op4Yif46h8fu6WGqkfB0gyq+VuJfSBpodUlRhZsOdymEql4cQHveww+f+oBDVOL91yDE04NIv+kAEI0Jc1Y2PtvG/bD0gapi7AEbO41H6You/4SrovA== x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM4PR11MB5994.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230001)(366004)(508600001)(64756008)(52536014)(8936002)(76116006)(55016003)(66476007)(66556008)(66946007)(33656002)(110136005)(54906003)(316002)(8676002)(82960400001)(450100002)(66446008)(122000001)(7696005)(38070700005)(2906002)(38100700002)(86362001)(53546011)(186003)(6506007)(26005)(9686003)(5660300002)(4326008)(71200400001)(83380400001); DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?6oSe1+HVZf+KrYvIg1zlw1nmWBEZyCtRC4ARY287JHUAN3XF5MauHah7uUNJ?= =?us-ascii?Q?HfZhuhomKIPynFZ+WAlmSXJgXS/VVICSAI39hCujCn/JUYoUiUkrHlQSGGQv?= =?us-ascii?Q?ag4ccSCAT6P3CXpIBCCuttF2wMzMMiq6MesF/uWVFw1J/udupWgrIrxKPz3X?= =?us-ascii?Q?c/Sp/epsX5DZrR4qmqGSnXhwrsqdiFR+ncVzA7OzMrZ/zxknQUCoE+zWhfQM?= =?us-ascii?Q?yMLyo86NnoHB1YDeX5rbCVu9cQRVXXF7Se+IDl5N8S+XX4xVhLayFovz1xzZ?= =?us-ascii?Q?a+ScN7g5nqq8xzLfiIEPu5toGJorLfSoJXCl1yCmW0hRb2b+PZrzZgcvFmGg?= =?us-ascii?Q?EPgRs0v0AHNok4zIEEV28hX59nBLfx2cKj+2in4RAgzeG6ezhxA5OvUEfeI0?= =?us-ascii?Q?FMSBM0qBBT1tpdJXd8YWO39OoYmZXiFPhulV6gmf9wYRJYJoy2EV+jczqmaY?= =?us-ascii?Q?BB7I4Y2coLbq1yRDJl3YKjgrPyN6Of4FBR+CdjjmW3HmEf8culFSnOzrgL8I?= =?us-ascii?Q?ERjD3PuBhB1gU1vHoEoQMBMVKM+b8bYPS88FPSQp4XRE0vsC3IpD30TVChhA?= =?us-ascii?Q?N7+GPRgiw8BjNyKxZSSSo2Ckt6+6jiLjc41DEsyO6nymGFoo0QIv5fdUebJP?= =?us-ascii?Q?v+f+jtDsgmeOeyvSsuk+Y5q6hKXT53bxD0m2xNHMiFkr9g42JiEWi7/V8sWC?= =?us-ascii?Q?TxT8lsxus6KZp2lk4GEn2Fdanga6XIXR+85iAL6tPCUYiv1O32dHgP7LBzGu?= =?us-ascii?Q?jVIlLj1cH5MSuZY5iqd+u1VGxPwEf5N3NH3yhB9F4eUOVhihlyhXR/JxRX0V?= =?us-ascii?Q?oYxkqtMahDvVP1QJpLji3l5SZu8yzrymfFWR1Yk86i6LblEfhoL9rk9odmor?= =?us-ascii?Q?wE+8uJqqWJHQnFOOEeHQGK7huq7lSj8j5I0lG2CCOoqNSHaxPvZgp3KDH/ZN?= =?us-ascii?Q?0pXufu8tqMz0qVwVAglxPApzWzsQptb141h9fd/7Frh/j3pg6bjb2jr1aSyv?= =?us-ascii?Q?B6QSd5jiIVa+buL7udHVpxoREcgIDLnHH8KG0p5QVoq9ix/jFwgjshgixibj?= =?us-ascii?Q?uv92OzF5wft14KjfwPncGhzlKWbkd7AbSDBZIqG/H265URABjKCFHZCe/oUp?= =?us-ascii?Q?bwAB6EWltehlZ/69NnPs/td6bdL1aAUEDY3qL54TS7ttGDpgc7yyye74PrH8?= =?us-ascii?Q?o5/kvudQoAz08XrdxVE0fd1gZX9lZE2AmiqAViPbxNQKsz652Cc5k/Ue8lkG?= =?us-ascii?Q?PMy5jJiKFDsH6W5jLZvlsTEyyGrgF3rLcf5a6AQkME7ItVIiUHiuvin7DTIT?= =?us-ascii?Q?AElG3eSLME6TEiSEjuWOOo4QP+wGmX43mrhSJeugAsumPWuyfFarw/JY2JVZ?= =?us-ascii?Q?jePkC7CPaAddR/gqUusRIPWlRIr3xHtK58eUCO6QAamTcZ9YX8Eq69j8HlEt?= =?us-ascii?Q?Is7KBLFDyMzh0CkeIMLO1LZGRlUb1zUIAb7hyK6Zgo8XMjcV8XOzUKHLLz5b?= =?us-ascii?Q?mZvlHYFsNkQXqgnQX/5UImjgtIR6IruQSv/LIgsvFrENz4casMcMW//6tjsE?= =?us-ascii?Q?viHl9yp86wdMbHBBtkHJyKKaxafR7wfwpTN9kTHEcWPefT8zPbp8AAyO1YLl?= =?us-ascii?Q?yKwrkC250o2KJhZZlUQMFsQ9uJG/q29QgIcP0OaCdKi3jjfJaE7UckBsudmX?= =?us-ascii?Q?rt11G7urwM0epac1XYZt0DHQqMA4fjJfEVNmTiwLpN4KPfgegVwyhrEjKTha?= =?us-ascii?Q?gpougenpDw=3D=3D?= arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IcZcUdt2AOTzyvsq/YrrSjxkgIeSZzSkQF6x7PjGbneKrW+VAw37d8XTcSrbuvRjn6xhScPZ6XcVi6WgZRYvd3dtVxafMqlwZiM63vkKpR5AAfFuJvD1WOF1eRYZpAaY9nc5i8EiDP/TUBR3wJd0OgTLKJSlmMPmuJXhfbd4Osxjhqbv9nMMtxuqz3uOvl/vEy48mWkZ+aNkrLC4RbpR6rQprW3MXoMbExJokGa8vchuegjlZDWSIqQmV5RE6SoCiVtadww7dfuD+xhY4+OX8SlhwpuuESfxYpC2Bpj7XNr1F1R8slT61zhN1EWJDB2HA63vAldN6y6Cm4ggSXwpLQ== arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=AFBtANlqgxnL3WKYndnkPD8tSm5GunR3qgAHfcq31G8=; b=KnC2jlfD1kQwsfJ+v/aax9HrT6ZTYpa7MiYkCIo4hY6UhBYyHB8jw0rTzvklMwFu+nHnzevOoJatIV2zQiNTFK0cmR3jsStThXIU6X+4YmDT74lMZJhxm3FbfnWTc+x/YW3VUUb2w2mMv7CLA5ljaHflEoiE+1pMaCdhYH5IagZtDE2TI1Fs++eHlYyY513xfbMP1yihMy0tZJawjXLZopnxj1R7HkCGUFLO2ylduZhAphlr2s3xduqRlarrUqAQ3UrZvueCPyQABBLcw5NpU9VajUmgrDVcMv2Yj/FFoBl/PU31t4wQJQxRXlDz/14S73qkN+c94Xd8cXeXi6V/Pg== arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none x-ms-exchange-crosstenant-authas: Internal x-ms-exchange-crosstenant-authsource: DM4PR11MB5994.namprd11.prod.outlook.com x-ms-exchange-crosstenant-network-message-id: 24923b64-b9da-4033-58e3-08da397dd5f5 x-ms-exchange-crosstenant-originalarrivaltime: 19 May 2022 09:56:24.9199 (UTC) x-ms-exchange-crosstenant-fromentityheader: Hosted x-ms-exchange-crosstenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d x-ms-exchange-crosstenant-mailboxtype: HOSTED x-ms-exchange-crosstenant-userprincipalname: +mizuayDqYEWAG5pbG1vLmp5YH+qP5Ua9N/nvQQdApafMMIJaT0Sr2jt/5WiNl4IeYzXhNhKiziQBTKTOO7TYw== x-ms-exchange-transport-crosstenantheadersstamped: SN6PR11MB3535 x-originatororg: intel.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org > -----Original Message----- > From: Ke Zhang > Sent: Thursday, May 19, 2022 5:31 PM > To: Li, Xiaoyun ; Wu, Jingjing ; > Xing, Beilei ; dev@dpdk.org > Cc: Zhang, Ke1X ; stable@dpdk.org > Subject: [PATCH v2] net/iavf: fix Rx queue interrupt setting > > For Rx-Queue Interrupt Setting, when vf rx interrupt disable(INTENA=3D0),= there > are two ways to write back descriptor to host memory: > > 1)Set WB_ON_ITR bit 0 to Interrupt Dynamic Control Register: > Completed descriptors are posted to host memory according to the internal > descriptor cache policy (in other words when a full cache line is availab= le for > write-back). > > 2)Set WB_ON_ITR bit 1 to Interrupt Dynamic Control Register: > Completed descriptors also trigger the ITR. Following ITR expiration, all > leftover completed descriptors are posted to host memory. > > Changing 1) to 2) to make sure VF synchronizing with PF. You only change 1) to 2) in iavf_dev_rx_queue_intr_disable please add more explanation what's the issue and how we fix this. > > Fixes: d6bde6b5eae9 ("net/avf: enable Rx interrupt") > Cc: stable@dpdk.org > > Signed-off-by: Ke Zhang > --- Please add change log here. > drivers/net/iavf/iavf_ethdev.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethde= v.c index > d6190ac24a..17c7720600 100644 > --- a/drivers/net/iavf/iavf_ethdev.c > +++ b/drivers/net/iavf/iavf_ethdev.c > @@ -1833,7 +1833,7 @@ iavf_dev_rx_queue_intr_disable(struct rte_eth_dev > *dev, uint16_t queue_id) > > IAVF_WRITE_REG(hw, > IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), > - 0); > + IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK); > > IAVF_WRITE_FLUSH(hw); > return 0; > -- > 2.25.1