[dpdk-stable] [PATCH] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[dpdk-stable] [PATCH] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Jiawei Wang]

When E-Switch mode is enabled, the NIC egress flows always added the
source vport in the matcher item, then cause the flows cannot be hit.
This commit fixes the issue that removes the souce port as matcher for
NIC egress flow.
Also adding the validation that rejects the NIC egress flows on the
representors ports.

Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 doc/guides/nics/mlx5.rst        |  2 ++
 drivers/net/mlx5/mlx5_flow_dv.c | 14 +++++++++++---
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 006896375f..0099128c98 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -479,6 +479,8 @@ Limitations
 
   - Needs OFED 5.4+.
 
+- The NIC Egress flow on representor port is not supported.
+
 Statistics
 ----------
 
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 842ada2ea9..58eb39d45f 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7992,6 +7992,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 		return rte_flow_error_set(error, EINVAL,
 				RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 				"sample before modify action is not supported");
+	if ((!attr->transfer && attr->egress) && priv->representor)
+		return rte_flow_error_set(error, EINVAL,
+					  RTE_FLOW_ERROR_TYPE_ITEM,
+					  NULL,
+					  "NIC egress rules on representors"
+					  " is not supported");
 	return 0;
 }
 
@@ -13556,11 +13562,13 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	/*
 	 * When E-Switch mode is enabled, we have two cases where we need to
 	 * set the source port manually.
-	 * The first one, is in case of Nic steering rule, and the second is
-	 * E-Switch rule where no port_id item was found. In both cases
-	 * the source port is set according the current port in use.
+	 * The first one, is in case of NIC ingress steering rule, and the
+	 * second is E-Switch rule where no port_id item was found.
+	 * In both cases the source port is set according the current port
+	 * in use.
 	 */
 	if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
+	    !(attr->egress && !attr->transfer) &&
 	    (priv->representor || priv->master)) {
 		if (flow_dv_translate_item_port_id(dev, match_mask,
 						   match_value, NULL, attr))
-- 
2.18.1

[dpdk-stable] [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Jiawei Wang]

When E-Switch mode was enabled, the NIC egress flows always added the
source vport in the matcher item, then cause the flows cannot be hit.
This commit fixes the issue that removes the source vport as matcher for
NIC egress flow.
Also adding the validation that rejects the NIC egress flows on the
representor ports.

Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
v2: fix one typo
---
 doc/guides/nics/mlx5.rst        |  2 ++
 drivers/net/mlx5/mlx5_flow_dv.c | 14 +++++++++++---
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 006896375f..0099128c98 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -479,6 +479,8 @@ Limitations
 
   - Needs OFED 5.4+.
 
+- The NIC Egress flow on representor port is not supported.
+
 Statistics
 ----------
 
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 842ada2ea9..58eb39d45f 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7992,6 +7992,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 		return rte_flow_error_set(error, EINVAL,
 				RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 				"sample before modify action is not supported");
+	if ((!attr->transfer && attr->egress) && priv->representor)
+		return rte_flow_error_set(error, EINVAL,
+					  RTE_FLOW_ERROR_TYPE_ITEM,
+					  NULL,
+					  "NIC egress rules on representors"
+					  " is not supported");
 	return 0;
 }
 
@@ -13556,11 +13562,13 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	/*
 	 * When E-Switch mode is enabled, we have two cases where we need to
 	 * set the source port manually.
-	 * The first one, is in case of Nic steering rule, and the second is
-	 * E-Switch rule where no port_id item was found. In both cases
-	 * the source port is set according the current port in use.
+	 * The first one, is in case of NIC ingress steering rule, and the
+	 * second is E-Switch rule where no port_id item was found.
+	 * In both cases the source port is set according the current port
+	 * in use.
 	 */
 	if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
+	    !(attr->egress && !attr->transfer) &&
 	    (priv->representor || priv->master)) {
 		if (flow_dv_translate_item_port_id(dev, match_mask,
 						   match_value, NULL, attr))
-- 
2.18.1

RE: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Raslan Darawsheh]

Hi,

> -----Original Message-----
> From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> Sent: Friday, November 5, 2021 10:59 AM
> To: Slava Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Ori Kam <orika@nvidia.com>; Ori Kam
> <orika@nvidia.com>; Yongseok Koh <yskoh@mellanox.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>;
> stable@dpdk.org
> Subject: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in switchdev
> mode
> 
> When E-Switch mode was enabled, the NIC egress flows always added the
> source vport in the matcher item, then cause the flows cannot be hit.
> This commit fixes the issue that removes the source vport as matcher for
> NIC egress flow.
> Also adding the validation that rejects the NIC egress flows on the
> representor ports.
> 
> Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
> Cc: stable@dpdk.org

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh

RE: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Jiawei(Jonny) Wang]

Hello Raslan,

I need send the new  V3 patch for this change, Sorry for the late update.

Thanks.
B.R.
Jonny

> -----Original Message-----
> From: Raslan Darawsheh <rasland@nvidia.com>
> Sent: Thursday, November 11, 2021 9:00 PM
> To: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>; Ori Kam
> <orika@nvidia.com>; Ori Kam <orika@nvidia.com>; Yongseok Koh
> <yskoh@mellanox.com>
> Cc: dev@dpdk.org; stable@dpdk.org
> Subject: RE: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in
> switchdev mode
> 
> Hi,
> 
> > -----Original Message-----
> > From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> > Sent: Friday, November 5, 2021 10:59 AM
> > To: Slava Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad
> > <matan@nvidia.com>; Ori Kam <orika@nvidia.com>; Ori Kam
> > <orika@nvidia.com>; Yongseok Koh <yskoh@mellanox.com>
> > Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>;
> > stable@dpdk.org
> > Subject: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in
> > switchdev mode
> >
> > When E-Switch mode was enabled, the NIC egress flows always added the
> > source vport in the matcher item, then cause the flows cannot be hit.
> > This commit fixes the issue that removes the source vport as matcher
> > for NIC egress flow.
> > Also adding the validation that rejects the NIC egress flows on the
> > representor ports.
> >
> > Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
> > Cc: stable@dpdk.org
> 
> Patch applied to next-net-mlx,
> 
> Kindest regards,
> Raslan Darawsheh

RE: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Raslan Darawsheh]

> -----Original Message-----
> From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> Sent: Thursday, November 11, 2021 3:18 PM
> To: Raslan Darawsheh <rasland@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>; Ori Kam
> <orika@nvidia.com>; Ori Kam <orika@nvidia.com>; Yongseok Koh
> <yskoh@mellanox.com>
> Cc: dev@dpdk.org; stable@dpdk.org
> Subject: RE: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in
> switchdev mode
> 
> Hello Raslan,
> 
> I need send the new  V3 patch for this change, Sorry for the late update.
> 
Sure, dropping this version for now, waiting for the updated version.

Kindest regards,
Raslan Darawsheh
> Thanks.
> B.R.
> Jonny
> 
> > -----Original Message-----
> > From: Raslan Darawsheh <rasland@nvidia.com>
> > Sent: Thursday, November 11, 2021 9:00 PM
> > To: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>; Slava Ovsiienko
> > <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>; Ori Kam
> > <orika@nvidia.com>; Ori Kam <orika@nvidia.com>; Yongseok Koh
> > <yskoh@mellanox.com>
> > Cc: dev@dpdk.org; stable@dpdk.org
> > Subject: RE: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in
> > switchdev mode
> >
> > Hi,
> >
> > > -----Original Message-----
> > > From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> > > Sent: Friday, November 5, 2021 10:59 AM
> > > To: Slava Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad
> > > <matan@nvidia.com>; Ori Kam <orika@nvidia.com>; Ori Kam
> > > <orika@nvidia.com>; Yongseok Koh <yskoh@mellanox.com>
> > > Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>;
> > > stable@dpdk.org
> > > Subject: [PATCH v2] net/mlx5: fix the NIC egress flow mismatch in
> > > switchdev mode
> > >
> > > When E-Switch mode was enabled, the NIC egress flows always added
> > > the source vport in the matcher item, then cause the flows cannot be hit.
> > > This commit fixes the issue that removes the source vport as matcher
> > > for NIC egress flow.
> > > Also adding the validation that rejects the NIC egress flows on the
> > > representor ports.
> > >
> > > Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port
> > > item")
> > > Cc: stable@dpdk.org
> >
> > Patch applied to next-net-mlx,
> >
> > Kindest regards,
> > Raslan Darawsheh

[PATCH v3] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Jiawei Wang]

When E-Switch mode was enabled, the NIC egress flows was implicitly
appended with source vport to match on. If the metadata register C0
was used to maintain the source vport, it was initialized to zero
on packet steering engine entry, the flow could be hit only
if source vport was zero, the register C0 of the packet was not correct
to match in the TX side, this caused egress flow misses.

This patch:
 - removes the implicit source vport match for NIC egress flow.
 - rejects the NIC egress flows on the representor ports at validation.
 - allows the internal NIC egress flows containing the TX_QUEUE items in
   order to not impact hairpins.

Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
v3: update the tx_item checking
v2: fix one typo
---
 doc/guides/nics/mlx5.rst        |  2 ++
 drivers/net/mlx5/mlx5_flow_dv.c | 24 ++++++++++++++++++++----
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 043d006a2b..267d25ebb8 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -493,6 +493,8 @@ Limitations
     completions, the scheduled send timestamps should not be specified
     with non-zero msb
 
+- The NIC Egress flow on representor port is not supported.
+
 Statistics
 ----------
 
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 28911d6f0f..201f04ca84 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7164,8 +7164,10 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 				return ret;
 			last_item = MLX5_FLOW_ITEM_TAG;
 			break;
-		case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
 		case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
+			last_item = MLX5_FLOW_ITEM_TX_QUEUE;
+			break;
+		case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
 			break;
 		case RTE_FLOW_ITEM_TYPE_GTP:
 			ret = flow_dv_validate_item_gtp(dev, items, item_flags,
@@ -7999,6 +8001,18 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 		return rte_flow_error_set(error, EINVAL,
 				RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 				"sample before modify action is not supported");
+	/*
+	 * Validation the NIC Egress flow on representor, except implicit
+	 * hairpin default egress flow with TX_QUEUE item, other flows not
+	 * work due to metadata regC0 mismatch.
+	 */
+	if ((!attr->transfer && attr->egress) && priv->representor &&
+	    !(item_flags & MLX5_FLOW_ITEM_TX_QUEUE))
+		return rte_flow_error_set(error, EINVAL,
+					  RTE_FLOW_ERROR_TYPE_ITEM,
+					  NULL,
+					  "NIC egress rules on representors"
+					  " is not supported");
 	return 0;
 }
 
@@ -13563,11 +13577,13 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	/*
 	 * When E-Switch mode is enabled, we have two cases where we need to
 	 * set the source port manually.
-	 * The first one, is in case of Nic steering rule, and the second is
-	 * E-Switch rule where no port_id item was found. In both cases
-	 * the source port is set according the current port in use.
+	 * The first one, is in case of NIC ingress steering rule, and the
+	 * second is E-Switch rule where no port_id item was found.
+	 * In both cases the source port is set according the current port
+	 * in use.
 	 */
 	if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
+	    !(attr->egress && !attr->transfer) &&
 	    (priv->representor || priv->master)) {
 		if (flow_dv_translate_item_port_id(dev, match_mask,
 						   match_value, NULL, attr))
-- 
2.18.1

RE: [PATCH v3] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Ori Kam]

Hi Jiawei,

> -----Original Message-----
> From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> Sent: Friday, November 12, 2021 2:43 PM
> Subject: [PATCH v3] net/mlx5: fix the NIC egress flow mismatch in switchdev mode
> 
> When E-Switch mode was enabled, the NIC egress flows was implicitly
> appended with source vport to match on. If the metadata register C0
> was used to maintain the source vport, it was initialized to zero
> on packet steering engine entry, the flow could be hit only
> if source vport was zero, the register C0 of the packet was not correct
> to match in the TX side, this caused egress flow misses.
> 
> This patch:
>  - removes the implicit source vport match for NIC egress flow.
>  - rejects the NIC egress flows on the representor ports at validation.
>  - allows the internal NIC egress flows containing the TX_QUEUE items in
>    order to not impact hairpins.
> 
> Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> ---
> v3: update the tx_item checking
> v2: fix one typo
> ---
>  doc/guides/nics/mlx5.rst        |  2 ++
>  drivers/net/mlx5/mlx5_flow_dv.c | 24 ++++++++++++++++++++----
>  2 files changed, 22 insertions(+), 4 deletions(-)
> 
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index 043d006a2b..267d25ebb8 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -493,6 +493,8 @@ Limitations
>      completions, the scheduled send timestamps should not be specified
>      with non-zero msb
> 
> +- The NIC Egress flow on representor port is not supported.
> +
>  Statistics
>  ----------
> 
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
> index 28911d6f0f..201f04ca84 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -7164,8 +7164,10 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr
> *attr,
>  				return ret;
>  			last_item = MLX5_FLOW_ITEM_TAG;
>  			break;
> -		case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
>  		case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
> +			last_item = MLX5_FLOW_ITEM_TX_QUEUE;
> +			break;
> +		case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
>  			break;
>  		case RTE_FLOW_ITEM_TYPE_GTP:
>  			ret = flow_dv_validate_item_gtp(dev, items, item_flags,
> @@ -7999,6 +8001,18 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr
> *attr,
>  		return rte_flow_error_set(error, EINVAL,
>  				RTE_FLOW_ERROR_TYPE_ACTION, NULL,
>  				"sample before modify action is not supported");
> +	/*
> +	 * Validation the NIC Egress flow on representor, except implicit
> +	 * hairpin default egress flow with TX_QUEUE item, other flows not
> +	 * work due to metadata regC0 mismatch.
> +	 */
> +	if ((!attr->transfer && attr->egress) && priv->representor &&
> +	    !(item_flags & MLX5_FLOW_ITEM_TX_QUEUE))
> +		return rte_flow_error_set(error, EINVAL,
> +					  RTE_FLOW_ERROR_TYPE_ITEM,
> +					  NULL,
> +					  "NIC egress rules on representors"
> +					  " is not supported");
>  	return 0;
>  }
> 
> @@ -13563,11 +13577,13 @@ flow_dv_translate(struct rte_eth_dev *dev,
>  	/*
>  	 * When E-Switch mode is enabled, we have two cases where we need to
>  	 * set the source port manually.
> -	 * The first one, is in case of Nic steering rule, and the second is
> -	 * E-Switch rule where no port_id item was found. In both cases
> -	 * the source port is set according the current port in use.
> +	 * The first one, is in case of NIC ingress steering rule, and the
> +	 * second is E-Switch rule where no port_id item was found.
> +	 * In both cases the source port is set according the current port
> +	 * in use.
>  	 */
>  	if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
> +	    !(attr->egress && !attr->transfer) &&
>  	    (priv->representor || priv->master)) {
>  		if (flow_dv_translate_item_port_id(dev, match_mask,
>  						   match_value, NULL, attr))
> --
> 2.18.1

Acked-by: Ori Kam <orika@nvidia.com>
Best,
Ori

[PATCH v4] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Jiawei Wang]

When E-Switch mode was enabled, the NIC egress flows was implicitly
appended with source vport to match on. If the metadata register C0
was used to maintain the source vport, it was initialized to zero
on packet steering engine entry, the flow could be hit only
if source vport was zero, the register C0 of the packet was not correct
to match in the TX side, this caused egress flow misses.

This patch:
 - removes the implicit source vport match for NIC egress flow.
 - rejects the NIC egress flows on the representor ports at validation.
 - allows the internal NIC egress flows containing the TX_QUEUE items in
   order to not impact hairpins.

Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
v4: rebase
v3: update the tx_item checking
v2: fix one typo
---
 doc/guides/nics/mlx5.rst        |  1 +
 drivers/net/mlx5/mlx5_flow_dv.c | 26 +++++++++++++++++++++-----
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index c31a154181..acf37bd862 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -504,6 +504,7 @@ Limitations
 
   Matching on checksum and sequence needs OFED 5.6+.
 
+- The NIC Egress flow on representor port is not supported.
 
 Statistics
 ----------
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index ae88a1cc29..b596144159 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7212,8 +7212,10 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 				return ret;
 			last_item = MLX5_FLOW_ITEM_TAG;
 			break;
-		case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
 		case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
+			last_item = MLX5_FLOW_ITEM_TX_QUEUE;
+			break;
+		case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
 			break;
 		case RTE_FLOW_ITEM_TYPE_GTP:
 			ret = flow_dv_validate_item_gtp(dev, items, item_flags,
@@ -8047,6 +8049,18 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 		return rte_flow_error_set(error, EINVAL,
 				RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 				"sample before modify action is not supported");
+	/*
+	 * Validation the NIC Egress flow on representor, except implicit
+	 * hairpin default egress flow with TX_QUEUE item, other flows not
+	 * work due to metadata regC0 mismatch.
+	 */
+	if ((!attr->transfer && attr->egress) && priv->representor &&
+	    !(item_flags & MLX5_FLOW_ITEM_TX_QUEUE))
+		return rte_flow_error_set(error, EINVAL,
+					  RTE_FLOW_ERROR_TYPE_ITEM,
+					  NULL,
+					  "NIC egress rules on representors"
+					  " is not supported");
 	return 0;
 }
 
@@ -13732,11 +13746,13 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	/*
 	 * When E-Switch mode is enabled, we have two cases where we need to
 	 * set the source port manually.
-	 * The first one, is in case of Nic steering rule, and the second is
-	 * E-Switch rule where no port_id item was found. In both cases
-	 * the source port is set according the current port in use.
+	 * The first one, is in case of NIC ingress steering rule, and the
+	 * second is E-Switch rule where no port_id item was found.
+	 * In both cases the source port is set according the current port
+	 * in use.
 	 */
-	if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode) {
+	if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode &&
+	    !(attr->egress && !attr->transfer)) {
 		if (flow_dv_translate_item_port_id(dev, match_mask,
 						   match_value, NULL, attr))
 			return -rte_errno;
-- 
2.18.1

RE: [PATCH v4] net/mlx5: fix the NIC egress flow mismatch in switchdev mode

[Raslan Darawsheh]

Hi,

> -----Original Message-----
> From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> Sent: Wednesday, March 2, 2022 5:31 PM
> To: Slava Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Ori Kam <orika@nvidia.com>; Yongseok Koh
> <yskoh@mellanox.com>; Ori Kam <orika@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>;
> stable@dpdk.org
> Subject: [PATCH v4] net/mlx5: fix the NIC egress flow mismatch in switchdev
> mode
> 
> When E-Switch mode was enabled, the NIC egress flows was implicitly
> appended with source vport to match on. If the metadata register C0
> was used to maintain the source vport, it was initialized to zero
> on packet steering engine entry, the flow could be hit only
> if source vport was zero, the register C0 of the packet was not correct
> to match in the TX side, this caused egress flow misses.
> 
> This patch:
>  - removes the implicit source vport match for NIC egress flow.
>  - rejects the NIC egress flows on the representor ports at validation.
>  - allows the internal NIC egress flows containing the TX_QUEUE items in
>    order to not impact hairpins.
> 
> Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> Acked-by: Ori Kam <orika@nvidia.com>
> ---
> v4: rebase
> v3: update the tx_item checking
> v2: fix one typo

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh