From: "Huang, Wei" <wei.huang@intel.com>
To: Thomas Monjalon <thomas@monjalon.net>,
"Zhang, Tianfei" <tianfei.zhang@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, "Xu, Rosen" <rosen.xu@intel.com>,
"Zhang, Qi Z" <qi.z.zhang@intel.com>,
"nipun.gupta@nxp.com" <nipun.gupta@nxp.com>,
"hemant.agrawal@nxp.com" <hemant.agrawal@nxp.com>,
"stable@dpdk.org" <stable@dpdk.org>,
"Yigit, Ferruh" <ferruh.yigit@intel.com>
Subject: RE: [PATCH v1] raw/ifpga: fix interrupt handle allocation
Date: Tue, 8 Mar 2022 01:31:23 +0000 [thread overview]
Message-ID: <DM6PR11MB3530DC5B91550E40E2AA3FDCEF099@DM6PR11MB3530.namprd11.prod.outlook.com> (raw)
In-Reply-To: <4078763.CrzyxZ31qj@thomas>
Hi Thomas,
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Tuesday, March 8, 2022 06:24
> To: Huang, Wei <wei.huang@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>
> Cc: dev@dpdk.org; Xu, Rosen <rosen.xu@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>; nipun.gupta@nxp.com; hemant.agrawal@nxp.com;
> stable@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>
> Subject: Re: [PATCH v1] raw/ifpga: fix interrupt handle allocation
>
> 21/02/2022 07:51, Zhang, Tianfei:
> > From: Huang, Wei <wei.huang@intel.com>
> > > Allocate FPGA interrupt handle instance for each card.
>
> It doesn't say what was the issue.
Original code use global interrupt handle for all cards, the same interrupt handle will be registered by each card, so only the last card will be interrupted correctly,
it's the problem.
>
> > >
> > > Fixes: e0a1aafe2af9 ("raw/ifpga: introduce IRQ functions")
> > > Cc: stable@dpdk.org
> > >
> > > Signed-off-by: Wei Huang <wei.huang@intel.com>
> >
> > It looks good for me.
> >
> > Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
>
> Applied
>
prev parent reply other threads:[~2022-03-08 1:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-18 7:38 Wei Huang
2022-02-21 6:51 ` Zhang, Tianfei
2022-03-07 22:24 ` Thomas Monjalon
2022-03-08 1:31 ` Huang, Wei [this message]
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