From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 61AC047D2 for ; Wed, 23 Nov 2016 02:03:33 +0100 (CET) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP; 22 Nov 2016 17:03:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,535,1473145200"; d="scan'208";a="34635066" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga006.fm.intel.com with ESMTP; 22 Nov 2016 17:03:31 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 22 Nov 2016 17:03:31 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.239]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.142]) with mapi id 14.03.0248.002; Wed, 23 Nov 2016 09:03:29 +0800 From: "Yang, Qiming" To: Yuanhan Liu CC: "stable@dpdk.org" Thread-Topic: [PATCH 1/2] net/i40e: fix link status change interrupt Thread-Index: AQHSRKz7K+/oeowHP0G9X/OKXGWQ3qDkaasAgAFWouA= Date: Wed, 23 Nov 2016 01:03:29 +0000 Message-ID: References: <1479811044-64778-1-git-send-email-qiming.yang@intel.com> <20161122123302.GV5048@yliu-dev.sh.intel.com> In-Reply-To: <20161122123302.GV5048@yliu-dev.sh.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOGMxMzUwZmQtZTk1Ny00MjY1LTg1OGYtODBmYjE3MTJkMTUxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6Im5MeUcrU1wvanZyWkdSSzdFRG9XXC9JS2tUNzNIem9GVlFoXC9WYmZ1WE9Mdzg9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-stable] [PATCH 1/2] net/i40e: fix link status change interrupt X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Nov 2016 01:03:33 -0000 Yes, I fixed the build errors with ICC. Sorry, I don't know them have alrea= dy been applied. I'll send another patch for bug fix. Also need to add fix line?=20 -----Original Message----- From: Yuanhan Liu [mailto:yuanhan.liu@linux.intel.com]=20 Sent: Tuesday, November 22, 2016 8:33 PM To: Yang, Qiming Cc: stable@dpdk.org Subject: Re: [PATCH 1/2] net/i40e: fix link status change interrupt On Tue, Nov 22, 2016 at 06:37:23PM +0800, Qiming Yang wrote: > [ backported from upstream commit=20 > b52fe009edc166bfce205c8ad931190c7d3f2d5f ] Do you meant to fix the build errors with ICC? The two patches have already= been applied, meaning you should send patches on top of the current 16.07 = stable branch to fix the build issue. --yliu > Previously, link status interrupt in i40e is achieved by checking=20 > LINK_STAT_CHANGE_MASK in PFINT_ICR0 register which is provided only=20 > for diagnostic use. Instead, drivers need to get the link status=20 > change notification by using LSE (Link Status Event). >=20 > This patch enables LSE and calls LSC callback when the event is=20 > received. This patch also removes the processing on=20 > LINK_STAT_CHANGE_MASK. >=20 > Fixes: 4861cde46116 ("i40e: new poll mode driver") >=20 > Signed-off-by: Qiming Yang > --- > drivers/net/i40e/i40e_ethdev.c | 97=20 > +++++++++--------------------------------- > 1 file changed, 19 insertions(+), 78 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c=20 > b/drivers/net/i40e/i40e_ethdev.c index d0aeb70..9c1f542 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -108,7 +108,6 @@ > I40E_PFINT_ICR0_ENA_GRST_MASK | \ > I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | \ > I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK | \ > - I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK | \ > I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | \ > I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK | \ > I40E_PFINT_ICR0_ENA_VFLR_MASK | \ > @@ -1768,6 +1767,16 @@ i40e_dev_start(struct rte_eth_dev *dev) > if (dev->data->dev_conf.intr_conf.lsc !=3D 0) > PMD_INIT_LOG(INFO, "lsc won't enable because of" > " no intr multiplex\n"); > + } else if (dev->data->dev_conf.intr_conf.lsc !=3D 0) { > + ret =3D i40e_aq_set_phy_int_mask(hw, > + ~(I40E_AQ_EVENT_LINK_UPDOWN | > + I40E_AQ_EVENT_MODULE_QUAL_FAIL | > + I40E_AQ_EVENT_MEDIA_NA), NULL); > + if (ret !=3D I40E_SUCCESS) > + PMD_DRV_LOG(WARNING, "Fail to set phy mask"); > + > + /* Call get_link_info aq commond to enable LSE */ > + i40e_dev_link_update(dev, 0); > } > =20 > /* enable uio intr after callback register */ @@ -1984,6 +1993,7 @@=20 > i40e_dev_link_update(struct rte_eth_dev *dev, > struct rte_eth_link link, old; > int status; > unsigned rep_cnt =3D MAX_REPEAT_TIME; > + bool enable_lse =3D dev->data->dev_conf.intr_conf.lsc ? true : false; > =20 > memset(&link, 0, sizeof(link)); > memset(&old, 0, sizeof(old)); > @@ -1992,7 +2002,8 @@ i40e_dev_link_update(struct rte_eth_dev *dev, > =20 > do { > /* Get link status information from hardware */ > - status =3D i40e_aq_get_link_info(hw, false, &link_status, NULL); > + status =3D i40e_aq_get_link_info(hw, enable_lse, > + &link_status, NULL); > if (status !=3D I40E_SUCCESS) { > link.link_speed =3D ETH_SPEED_NUM_100M; > link.link_duplex =3D ETH_LINK_FULL_DUPLEX; @@ -5442,6 +5453,12 @@=20 > i40e_dev_handle_aq_msg(struct rte_eth_dev *dev) > info.msg_buf, > info.msg_len); > break; > + case i40e_aqc_opc_get_link_status: > + ret =3D i40e_dev_link_update(dev, 0); > + if (!ret) > + _rte_eth_dev_callback_process(dev, > + RTE_ETH_EVENT_INTR_LSC); > + break; > default: > PMD_DRV_LOG(ERR, "Request %u is not supported yet", > opcode); > @@ -5451,57 +5468,6 @@ i40e_dev_handle_aq_msg(struct rte_eth_dev *dev) > rte_free(info.msg_buf); > } > =20 > -/* > - * Interrupt handler is registered as the alarm callback for handling=20 > LSC > - * interrupt in a definite of time, in order to wait the NIC into a=20 > stable > - * state. Currently it waits 1 sec in i40e for the link up interrupt,=20 > and > - * no need for link down interrupt. > - */ > -static void > -i40e_dev_interrupt_delayed_handler(void *param) -{ > - struct rte_eth_dev *dev =3D (struct rte_eth_dev *)param; > - struct i40e_hw *hw =3D I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > - uint32_t icr0; > - > - /* read interrupt causes again */ > - icr0 =3D I40E_READ_REG(hw, I40E_PFINT_ICR0); > - > -#ifdef RTE_LIBRTE_I40E_DEBUG_DRIVER > - if (icr0 & I40E_PFINT_ICR0_ECC_ERR_MASK) > - PMD_DRV_LOG(ERR, "ICR0: unrecoverable ECC error\n"); > - if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) > - PMD_DRV_LOG(ERR, "ICR0: malicious programming detected\n"); > - if (icr0 & I40E_PFINT_ICR0_GRST_MASK) > - PMD_DRV_LOG(INFO, "ICR0: global reset requested\n"); > - if (icr0 & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) > - PMD_DRV_LOG(INFO, "ICR0: PCI exception\n activated\n"); > - if (icr0 & I40E_PFINT_ICR0_STORM_DETECT_MASK) > - PMD_DRV_LOG(INFO, "ICR0: a change in the storm control " > - "state\n"); > - if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) > - PMD_DRV_LOG(ERR, "ICR0: HMC error\n"); > - if (icr0 & I40E_PFINT_ICR0_PE_CRITERR_MASK) > - PMD_DRV_LOG(ERR, "ICR0: protocol engine critical error\n"); > -#endif /* RTE_LIBRTE_I40E_DEBUG_DRIVER */ > - > - if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { > - PMD_DRV_LOG(INFO, "INT:VF reset detected\n"); > - i40e_dev_handle_vfr_event(dev); > - } > - if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { > - PMD_DRV_LOG(INFO, "INT:ADMINQ event\n"); > - i40e_dev_handle_aq_msg(dev); > - } > - > - /* handle the link up interrupt in an alarm callback */ > - i40e_dev_link_update(dev, 0); > - _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC); > - > - i40e_pf_enable_irq0(hw); > - rte_intr_enable(&(dev->pci_dev->intr_handle)); > -} > - > /** > * Interrupt handler triggered by NIC for handling > * specific interrupt. > @@ -5558,31 +5524,6 @@ i40e_dev_interrupt_handler(__rte_unused struct rte= _intr_handle *handle, > PMD_DRV_LOG(INFO, "ICR0: adminq event"); > i40e_dev_handle_aq_msg(dev); > } > - > - /* Link Status Change interrupt */ > - if (icr0 & I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK) { > -#define I40E_US_PER_SECOND 1000000 > - struct rte_eth_link link; > - > - PMD_DRV_LOG(INFO, "ICR0: link status changed\n"); > - memset(&link, 0, sizeof(link)); > - rte_i40e_dev_atomic_read_link_status(dev, &link); > - i40e_dev_link_update(dev, 0); > - > - /* > - * For link up interrupt, it needs to wait 1 second to let the > - * hardware be a stable state. Otherwise several consecutive > - * interrupts can be observed. > - * For link down interrupt, no need to wait. > - */ > - if (!link.link_status && rte_eal_alarm_set(I40E_US_PER_SECOND, > - i40e_dev_interrupt_delayed_handler, (void *)dev) >=3D 0) > - return; > - else > - _rte_eth_dev_callback_process(dev, > - RTE_ETH_EVENT_INTR_LSC); > - } > - > done: > /* Enable interrupt */ > i40e_pf_enable_irq0(hw); > -- > 2.7.4