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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SA1PR11MB6613.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8b4a057a-e175-41f0-5b67-08db1e0f8a73 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Mar 2023 06:53:49.9059 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iPo4oHj9SDMzq4EtGSeou45c2CnFUfYrM8nmt+SwyGz+Q3X9hi2pMyahZys7Jtdc56vpc09d5RdYB+aeQ+v6Jw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO1PR11MB4929 X-OriginatorOrg: intel.com X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org > -----Original Message----- > From: David Marchand > Sent: Tuesday, December 13, 2022 5:19 PM > To: dev@dpdk.org > Cc: stable@dpdk.org; Zhang, Yuying ; Xing, Beilei > ; Zhang, Qi Z ; Dapeng Yu > ; Wenxuan Wu ; Wang, > Jie1X > Subject: [PATCH v2] net/i40e: don't check link status on device start >=20 > The mentioned changes broke existing applications when the link status of > i40e ports is down at the time the port is started. > Revert those changes, the original issue will need a different fix. >=20 > Fixes: a4ba77367923 ("net/i40e: enable maximum frame size at port level") > Fixes: 2184f7cdeeaa ("net/i40e: fix max frame size config at port level") > Fixes: 719469f13b11 ("net/i40e: fix jumbo frame Rx with X722") > Cc: stable@dpdk.org >=20 > Signed-off-by: David Marchand > --- > Changes since v1: > - since the CI reports a failure on v1, simplified the fix by only > reverting commits, >=20 > --- > drivers/net/i40e/i40e_ethdev.c | 50 +++++----------------------------- > 1 file changed, 7 insertions(+), 43 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 7726a89d99..a982e42264 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -387,7 +387,6 @@ static int i40e_set_default_mac_addr(struct > rte_eth_dev *dev, > struct rte_ether_addr *mac_addr); >=20 > static int i40e_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); -sta= tic > void i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size); >=20 > static int i40e_ethertype_filter_convert( > const struct rte_eth_ethertype_filter *input, @@ -1711,6 +1710,11 @@ > eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused= ) > */ > i40e_add_tx_flow_control_drop_filter(pf); >=20 > + /* Set the max frame size to 0x2600 by default, > + * in case other drivers changed the default value. > + */ > + i40e_aq_set_mac_config(hw, I40E_FRAME_SIZE_MAX, TRUE, false, 0, > NULL); > + > /* initialize RSS rule list */ > TAILQ_INIT(&pf->rss_config_list); >=20 > @@ -2328,7 +2332,6 @@ i40e_dev_start(struct rte_eth_dev *dev) > uint32_t intr_vector =3D 0; > struct i40e_vsi *vsi; > uint16_t nb_rxq, nb_txq; > - uint16_t max_frame_size; >=20 > hw->adapter_stopped =3D 0; >=20 > @@ -2467,9 +2470,6 @@ i40e_dev_start(struct rte_eth_dev *dev) > "please call hierarchy_commit() " > "before starting the port"); >=20 > - max_frame_size =3D dev->data->mtu + I40E_ETH_OVERHEAD; > - i40e_set_mac_max_frame(dev, max_frame_size); > - > return I40E_SUCCESS; >=20 > tx_err: > @@ -2809,9 +2809,6 @@ i40e_dev_set_link_down(struct rte_eth_dev *dev) > return i40e_phy_conf_link(hw, abilities, speed, false); } >=20 > -#define CHECK_INTERVAL 100 /* 100ms */ > -#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total */ > - > static __rte_always_inline void > update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link) { @@ > -2878,6 +2875,8 @@ static __rte_always_inline void update_link_aq(struct > i40e_hw *hw, struct rte_eth_link *link, > bool enable_lse, int wait_to_complete) { > +#define CHECK_INTERVAL 100 /* 100ms */ > +#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total */ > uint32_t rep_cnt =3D MAX_REPEAT_TIME; > struct i40e_link_status link_status; > int status; > @@ -6738,7 +6737,6 @@ i40e_dev_handle_aq_msg(struct rte_eth_dev *dev) > if (!ret) > rte_eth_dev_callback_process(dev, > RTE_ETH_EVENT_INTR_LSC, NULL); > - > break; > default: > PMD_DRV_LOG(DEBUG, "Request %u is not supported yet", @@ > -12123,40 +12121,6 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf) > return ret; > } >=20 > -static void > -i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size) -{ > - struct i40e_hw *hw =3D > I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > - uint32_t rep_cnt =3D MAX_REPEAT_TIME; > - struct rte_eth_link link; > - enum i40e_status_code status; > - bool can_be_set =3D true; > - > - /* > - * I40E_MEDIA_TYPE_BASET link up can be ignored > - * I40E_MEDIA_TYPE_BASET link down that hw->phy.media_type > - * is I40E_MEDIA_TYPE_UNKNOWN > - */ > - if (hw->phy.media_type !=3D I40E_MEDIA_TYPE_BASET && > - hw->phy.media_type !=3D I40E_MEDIA_TYPE_UNKNOWN) { > - do { > - update_link_reg(hw, &link); > - if (link.link_status) > - break; > - rte_delay_ms(CHECK_INTERVAL); > - } while (--rep_cnt); > - can_be_set =3D !!link.link_status; > - } > - > - if (can_be_set) { > - status =3D i40e_aq_set_mac_config(hw, size, TRUE, 0, false, NULL); > - if (status !=3D I40E_SUCCESS) > - PMD_DRV_LOG(ERR, "Failed to set max frame size at port > level"); > - } else { > - PMD_DRV_LOG(ERR, "Set max frame size at port level not applicable > on link down"); > - } > -} > - > RTE_LOG_REGISTER_SUFFIX(i40e_logtype_init, init, NOTICE); > RTE_LOG_REGISTER_SUFFIX(i40e_logtype_driver, driver, NOTICE); #ifdef > RTE_ETHDEV_DEBUG_RX > -- > 2.38.1 Acked-by: Simei Su Thanks, Simei=20