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Thanks, Simei > -----Original Message----- > From: Su, Simei > Sent: Monday, February 20, 2023 3:27 PM > To: Wu, Wenjun1 > Cc: Su, Simei ; stable@dpdk.org > Subject: [PATCH v6] net/i40e: rework maximum frame size configuration >=20 > The issue reported by David is that error occurs in OVS due to the fix pa= tch in > mentionned changes below. The detailed reproduce step and result is in > https://patchwork.dpdk.org/project/dpdk/patch/ > 20211207085946.121032-1-dapengx.yu@intel.com/. >=20 > This patch removes unnecessary link status check and directly sets mac co= nfig > in dev_start. Also, it sets the parameter "wait to complete" true to wait= for > more time to make sure adminq command execute completed. >=20 > Fixes: a4ba77367923 ("net/i40e: enable maximum frame size at port level") > Fixes: 2184f7cdeeaa ("net/i40e: fix max frame size config at port level") > Fixes: 719469f13b11 ("net/i40e: fix jumbo frame Rx with X722") > Cc: stable@dpdk.org >=20 > Signed-off-by: Simei Su > --- > v6: > * Refine commit log. > * Remove return error. >=20 > v5: > * Fix misspelling in commit log. >=20 > v4: > * Refine commit log. > * Avoid duplicate call to set parameter "wait to complete" true. >=20 > v3: > * Put link update before interrupt enable. >=20 > v2: > * Refine commit log. > * Add link update. >=20 > drivers/net/i40e/i40e_ethdev.c | 50 ++++++++----------------------------= ------ > 1 file changed, 9 insertions(+), 41 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 7726a89d..30c904c 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -387,7 +387,6 @@ static int i40e_set_default_mac_addr(struct > rte_eth_dev *dev, > struct rte_ether_addr *mac_addr); >=20 > static int i40e_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); -sta= tic > void i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size); >=20 > static int i40e_ethertype_filter_convert( > const struct rte_eth_ethertype_filter *input, @@ -2449,7 +2448,7 @@ > i40e_dev_start(struct rte_eth_dev *dev) > PMD_DRV_LOG(WARNING, "Fail to set phy mask"); >=20 > /* Call get_link_info aq command to enable/disable LSE */ > - i40e_dev_link_update(dev, 0); > + i40e_dev_link_update(dev, 1); > } >=20 > if (dev->data->dev_conf.intr_conf.rxq =3D=3D 0) { @@ -2467,8 +2466,12 @= @ > i40e_dev_start(struct rte_eth_dev *dev) > "please call hierarchy_commit() " > "before starting the port"); >=20 > - max_frame_size =3D dev->data->mtu + I40E_ETH_OVERHEAD; > - i40e_set_mac_max_frame(dev, max_frame_size); > + max_frame_size =3D dev->data->mtu ? > + dev->data->mtu + I40E_ETH_OVERHEAD : > + I40E_FRAME_SIZE_MAX; > + > + /* Set the max frame size to HW*/ > + i40e_aq_set_mac_config(hw, max_frame_size, TRUE, false, 0, NULL); >=20 > return I40E_SUCCESS; >=20 > @@ -2809,9 +2812,6 @@ i40e_dev_set_link_down(struct rte_eth_dev *dev) > return i40e_phy_conf_link(hw, abilities, speed, false); } >=20 > -#define CHECK_INTERVAL 100 /* 100ms */ > -#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total */ > - > static __rte_always_inline void > update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link) { @@ > -2878,6 +2878,8 @@ static __rte_always_inline void update_link_aq(struct > i40e_hw *hw, struct rte_eth_link *link, > bool enable_lse, int wait_to_complete) { > +#define CHECK_INTERVAL 100 /* 100ms */ > +#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total > */ > uint32_t rep_cnt =3D MAX_REPEAT_TIME; > struct i40e_link_status link_status; > int status; > @@ -12123,40 +12125,6 @@ i40e_cloud_filter_qinq_create(struct i40e_pf > *pf) > return ret; > } >=20 > -static void > -i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size) -{ > - struct i40e_hw *hw =3D > I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > - uint32_t rep_cnt =3D MAX_REPEAT_TIME; > - struct rte_eth_link link; > - enum i40e_status_code status; > - bool can_be_set =3D true; > - > - /* > - * I40E_MEDIA_TYPE_BASET link up can be ignored > - * I40E_MEDIA_TYPE_BASET link down that hw->phy.media_type > - * is I40E_MEDIA_TYPE_UNKNOWN > - */ > - if (hw->phy.media_type !=3D I40E_MEDIA_TYPE_BASET && > - hw->phy.media_type !=3D I40E_MEDIA_TYPE_UNKNOWN) { > - do { > - update_link_reg(hw, &link); > - if (link.link_status) > - break; > - rte_delay_ms(CHECK_INTERVAL); > - } while (--rep_cnt); > - can_be_set =3D !!link.link_status; > - } > - > - if (can_be_set) { > - status =3D i40e_aq_set_mac_config(hw, size, TRUE, 0, false, NULL); > - if (status !=3D I40E_SUCCESS) > - PMD_DRV_LOG(ERR, "Failed to set max frame size at port > level"); > - } else { > - PMD_DRV_LOG(ERR, "Set max frame size at port level not > applicable on link down"); > - } > -} > - > RTE_LOG_REGISTER_SUFFIX(i40e_logtype_init, init, NOTICE); > RTE_LOG_REGISTER_SUFFIX(i40e_logtype_driver, driver, NOTICE); #ifdef > RTE_ETHDEV_DEBUG_RX > -- > 2.9.5