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charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN7PR11MB7139.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 691bd951-b615-4af1-5ae7-08db29b11c58 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2023 02:08:06.4091 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: z9SfcnutbAxubQ1mjqYuw60vRxrEDHg4sCAYfRWcGGWHkrjVzoQ6B3IuSyr9FT8lsE7Nwf+jn7tifO0OCjOHTw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR11MB5976 X-OriginatorOrg: intel.com X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi Qi, here is my new solution, can you give me some good suggestions. 1. remove the 'vc_event_msg_cb =3D=3D NULL' related processing and let each= 'ice-rest' thread, end normally. 2. Define vsi_update_thread_num as rte_atomic32_t. > -----Original Message----- > From: Zhang, Qi Z > Sent: 2023=1B$BG/=1B(B3=1B$B7n=1B(B20=1B$BF|=1B(B 20:53 > To: Ye, MingjinX ; dev@dpdk.org > Cc: Yang, Qiming ; stable@dpdk.org; Zhou, YidingX > ; Zhang, Ke1X > Subject: RE: [PATCH v5] net/ice: fix ice dcf control thread crash > > for (;;) { > > + if (hw->vc_event_msg_cb =3D=3D NULL) > > + break; > Can you explain why this is required, seems it not related with your comm= it > log The purpose of this is to bring all 'ice-reset' threads to a quick end when= hw is released. > > > > - rte_intr_enable(pci_dev->intr_handle); > > - ice_dcf_enable_irq0(hw); > > + if (hw->vc_event_msg_cb !=3D NULL) { > > + rte_intr_enable(pci_dev->intr_handle); > > + ice_dcf_enable_irq0(hw); >=20 > Same question as above These are called when HW releases the resource. Therefore, there is no need= to call. > > + rte_spinlock_lock(&dcf_hw->vsi_thread_lock); > > + dcf_hw->vsi_update_thread_num++; > > + rte_spinlock_unlock(&dcf_hw->vsi_thread_lock); >=20 > I think you can define vsi_update_thread_num as rte_atomic32_t and use > rte_atomic32_add/sub At first I chose the rte_atomic32_t option, which is not very elegant using spinlock. The 'checkpatches.sh' script gives a warning ('Using rte_atomicNN_xxx') when it is executed. I saw the comment on line 89 of the script (# refrain from new additions of 16/32/64 bits rte_atomicNN_xxx()), so I went with the spinlock solution.