From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id CB34CA0AC5 for ; Fri, 3 May 2019 18:10:55 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 63ED87D05; Fri, 3 May 2019 18:10:55 +0200 (CEST) Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-eopbgr60066.outbound.protection.outlook.com [40.107.6.66]) by dpdk.org (Postfix) with ESMTP id 35DD95B40; Fri, 3 May 2019 18:10:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=l6FG8zDWvMDJARgos6/OEHS8zutdd7x3pAQ8qgoKmJ8=; b=GWaXQlopmyAvV2puWOU1IGv56OX+uxFvgN9bPMsKenS+KcQtdZ2anFeEqihTtuprmDRttsqm/7kOKJDuyvvPQDF6xtWG2eHoBVKk1oVxY4dw/Hp9iPeRZxCMokTs7m07AbhARJRjVMlNmDfHw7rXe/AiF/G7AiulWtThuPJnh0k= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5183.eurprd08.prod.outlook.com (20.179.31.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1835.16; Fri, 3 May 2019 16:10:47 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea%5]) with mapi id 15.20.1856.012; Fri, 3 May 2019 16:10:47 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" , "jerinj@marvell.com" , "thomas@monjalon.net" CC: "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "shahafs@mellanox.com" , "Gavin Hu (Arm Technology China)" , "stable@dpdk.org" , Luca Boccassi , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH v2] build: disable armv8 crypto extension Thread-Index: AQHVAauzmkiFG4Tv5EaKa0BQLwiRC6ZZe7hggAAUOdA= Date: Fri, 3 May 2019 16:10:47 +0000 Message-ID: References: <20190502015806.41497-1-yskoh@mellanox.com> <20190503122813.8938-1-yskoh@mellanox.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b7cee806-7dc0-4f22-08c3-08d6cfe1e765 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:VE1PR08MB5183; x-ms-traffictypediagnostic: VE1PR08MB5183: x-ms-exchange-purlcount: 1 x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; x-forefront-prvs: 0026334A56 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(376002)(396003)(39860400002)(136003)(346002)(199004)(13464003)(189003)(508600001)(99286004)(316002)(54906003)(72206003)(6436002)(110136005)(102836004)(66066001)(5660300002)(33656002)(53546011)(229853002)(7696005)(966005)(186003)(26005)(2940100002)(52536014)(6506007)(76176011)(86362001)(7736002)(446003)(71190400001)(81166006)(8676002)(8936002)(81156014)(305945005)(11346002)(68736007)(74316002)(486006)(256004)(2201001)(14454004)(4326008)(476003)(64756008)(66946007)(66476007)(6246003)(73956011)(6306002)(66556008)(76116006)(71200400001)(53936002)(2906002)(14444005)(6116002)(55016002)(3846002)(25786009)(2501003)(66446008)(9686003); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5183; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: TQBUXRTQbwed8pwgBvlo1E50wjP9jS/g/KWAoDUMf7MAZFyaf6vKoNojNrcEOQ3wX8Ug+HXEvbq/Rl+8391j72yuxKgtuYjHHC3aP30jA6KkmdV8LmeFCZZPinBU1SpRMvlh2eMp55z13H5jEiYpD2DHLbwFftgi8dkO5OcGBo8QHIZYU9UpNkOaRqntceKHfsCMtnj9CcdE60o5ByhfHXkeaG/DSBjR/aZn4A/e1OrRPVdk3kJdZZlmmh7mEjrXT8yCl7OwSi8EzMKzlYPGxG7wU31THeN+x8y3ZZnyF3FlQF8QJP+XYkibPSu4/rlLyT1cm70G3U0ZNAIwgYevud3COEoLQIkFiRPxFh2g8cTno6YjngAzpv59uehqxm/PBagTF9YS9iDCT3QV/Ge8BK1R8+8bpW/mvxemP9/nTuw= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: b7cee806-7dc0-4f22-08c3-08d6cfe1e765 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 16:10:47.4752 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5183 Subject: Re: [dpdk-stable] [PATCH v2] build: disable armv8 crypto extension X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" >=20 > Hi Yongseok, > We need to enable 'CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO' > (which would require a documentation change in [1]). I enabled this and compiled, the compilation fails. Ideally (as discussed i= n other threads), the PMD code itself does not make use of the crypto instr= uctions, so we should be able to compile the PMDs. Crypto functionality sho= uld not be available only if crypto is not available from the CPU or the cr= ypto library is not present. Otherwise, there is no way to use crypto in di= stro package without recompiling. We can take this up separately.=20 I think this change might > have an impact on the existing users. Does this change need to be documen= ted > somewhere (at least in the release notes)? >=20 > [1] https://doc.dpdk.org/guides-19.02/cryptodevs/armv8.html >=20 > > -----Original Message----- > > From: Yongseok Koh > > Sent: Friday, May 3, 2019 7:28 AM > > To: jerinj@marvell.com; thomas@monjalon.net > > Cc: dev@dpdk.org; bruce.richardson@intel.com; > > pbhagavatula@marvell.com; shahafs@mellanox.com; Gavin Hu (Arm > > Technology China) ; Honnappa Nagarahalli > > ; stable@dpdk.org > > Subject: [PATCH v2] build: disable armv8 crypto extension > > > > Per armv8 crypto extension support, make build always enable it by > > default as long as compiler supports the feature while meson build > > only enables it for 'default' machine of generic armv8 architecture. > > > > It is known that not all the armv8 platforms have the crypto > > extension. For example, Mellanox BlueField has a variant which doesn't > > have it. If crypto enabled binary runs on such a platform, rte_eal_init= () fails. > > > > '+crypto' flag currently implies only '+aes' and '+sha2' and enabling > > it will generate the crypto instructions only when crypto intrinsics ar= e used. > > For the devices supporting 8.2 crypto or newer, compiler could > > generate such instructions beyond intrinsics or asm code. For example, > > compiler can generate 3-way exclusive OR instructions if sha3 is > > supported. However, it has to be enabled by adding '+sha3' as of today. > > > > In DPDK, armv8 cryptodev is the only one which requires the crypto supp= ort. > > As it even uses external library of Marvell which is compiled out of > > DPDK with crypto support and there's run-time check for required > > cpuflags, crypto support can be disabled in DPDK. > > > > Cc: stable@dpdk.org > > > > Signed-off-by: Yongseok Koh > > --- > > > > v2: > > * disable crypto support instead of having a build config > > > > config/arm/meson.build | 2 +- > > mk/machine/armv8a/rte.vars.mk | 2 +- > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/config/arm/meson.build b/config/arm/meson.build index > > 7fa6ed3105..abc8cf346c 100644 > > --- a/config/arm/meson.build > > +++ b/config/arm/meson.build > > @@ -74,7 +74,7 @@ flags_octeontx2_extra =3D [ > > ['RTE_USE_C11_MEM_MODEL', true]] > > > > machine_args_generic =3D [ > > - ['default', ['-march=3Darmv8-a+crc+crypto']], > > + ['default', ['-march=3Darmv8-a+crc']], > IIRC, this would impact distro packaging as well. Adding Luca. >=20 > > ['native', ['-march=3Dnative']], > > ['0xd03', ['-mcpu=3Dcortex-a53']], > > ['0xd04', ['-mcpu=3Dcortex-a35']], > > diff --git a/mk/machine/armv8a/rte.vars.mk > > b/mk/machine/armv8a/rte.vars.mk index 8252efbb7b..5e3ffc3adf 100644 > > --- a/mk/machine/armv8a/rte.vars.mk > > +++ b/mk/machine/armv8a/rte.vars.mk > > @@ -28,4 +28,4 @@ > > # CPU_LDFLAGS =3D > > # CPU_ASFLAGS =3D > > > > -MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc+crypto > > +MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc > > -- > > 2.11.0