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Tue, 25 Sep 2018 09:26:34 +0000 From: "Gavin Hu (Arm Technology China)" To: Jerin Jacob CC: "dev@dpdk.org" , Honnappa Nagarahalli , Steve Capper , Ola Liljedahl , nd , "stable@dpdk.org" , Justin He Thread-Topic: [PATCH v4 2/4] ring: read tail using atomic load Thread-Index: AQHUTl4Le3Ten06/yEiFawV/UHq2D6T4vSwAgAgJgHA= Date: Tue, 25 Sep 2018 09:26:34 +0000 Message-ID: References: <20180917074735.28161-1-gavin.hu@arm.com> <1537171879-64390-1-git-send-email-gavin.hu@arm.com> <1537171879-64390-2-git-send-email-gavin.hu@arm.com> <20180920064117.GC2283@jerin> In-Reply-To: <20180920064117.GC2283@jerin> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Gavin.Hu@arm.com; x-originating-ip: [113.29.88.7] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; VI1PR08MB0926; 6:2nszpUDQibvp5YdGxQr6moqBURkTt36d2tcp/ZwrC5gWUtW7+2HRJiuMEsSJyCI4UCklFQBk/D5aw1ANX6aoMN9qFV5WJ6L5ysdxWyp1LiOAszcuFefvsbzAt12JhAf5qtZ+RoQ3PDHmj+CoMfSQ3f+Kc02y/1tEGdAAIJ3oYOqDlbojWGqR8+W61OzrB+mcZocp8y9tCuGNfS4DApk3omPOBU7vp5qM11Fbej3W056EkZYNIf9Kl2meILlw92PCegzgmRueHWkb0h/Kh4vewm1nQuPjpJprDblD7vWfu6nk6d/C78IVzbrDD8vlg6PAcmzNvaV2XV1IQ0A3ez27MhiXbdy/A1Sg2wp1auzCFfDsZmvuCG7W+7S7yi22pNbtzFqBohftITMwXXII2GMBZGecPh6KfRjt5ggKre6r8XiH9eaOR4uPq5htEdHPeC9wm/37jsMG6Nndqsz2OzKypQ==; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR08MB0926; H:VI1PR08MB3167.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: s7h7xXL0d+d+yLGSOy7BU1lEy1FcTzUmKoLZ4ZgGbJZiSG5jYCKB8VluofjaTy8N10MTBxwrNgs9B5+hpW68xQFrnfHKq7kiRtWnmxd2+A6laXp9is0svVjGTiL7BA0U2vApblVcmPaLNYant//wK3ZNKXulVvfv22hn+cQ9bWa9U04rgnS0a9OIJO4FzM9Gc/kG/akWs5XdmNc33izC9erLbyrMsH1CeUsKWyEdsjQPJLQsfOdttdD1PAsDn4EcUZwJlnXaN55t75hMEpmEJM58dMEkGZC0fYRnq7Ll5U1wTlbxFlXBkrPEEQOr/s9hYoxjKktWbmYhkKw7NAYhwS1eS0pDLfpA8ZvWWSxUqFQ= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: b5a1cedb-d65b-4962-7161-08d622c8fc84 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Sep 2018 09:26:34.3439 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB0926 Subject: Re: [dpdk-stable] [PATCH v4 2/4] ring: read tail using atomic load X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 25 Sep 2018 09:26:37 -0000 + Justin He as Jerin requested.=20 > -----Original Message----- > From: Jerin Jacob > Sent: Thursday, September 20, 2018 2:41 PM > To: Gavin Hu (Arm Technology China) > Cc: dev@dpdk.org; Honnappa Nagarahalli > ; Steve Capper > ; Ola Liljedahl ; nd > ; stable@dpdk.org; jia.he@hxt-semitech.com > Subject: Re: [PATCH v4 2/4] ring: read tail using atomic load >=20 > -----Original Message----- > > Date: Mon, 17 Sep 2018 16:11:17 +0800 > > From: Gavin Hu > > To: dev@dpdk.org > > CC: gavin.hu@arm.com, Honnappa.Nagarahalli@arm.com, > > steve.capper@arm.com, Ola.Liljedahl@arm.com, > > jerin.jacob@caviumnetworks.com, nd@arm.com, stable@dpdk.org > > Subject: [PATCH v4 2/4] ring: read tail using atomic load > > X-Mailer: git-send-email 2.7.4 > > > > > > In update_tail, read ht->tail using __atomic_load.Although the > > compiler currently seems to be doing the right thing even without > > _atomic_load, we don't want to give the compiler freedom to optimise > > what should be an atomic load, it should not be arbitarily moved > > around. > > > > Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option") > > Cc: stable@dpdk.org >=20 >=20 > + Jia He >=20 > > > > Signed-off-by: Gavin Hu > > Reviewed-by: Honnappa Nagarahalli > > Reviewed-by: Steve Capper > > Reviewed-by: Ola Liljedahl > > --- > > lib/librte_ring/rte_ring_c11_mem.h | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/lib/librte_ring/rte_ring_c11_mem.h > > b/lib/librte_ring/rte_ring_c11_mem.h > > index 94df3c4..234fea0 100644 > > --- a/lib/librte_ring/rte_ring_c11_mem.h > > +++ b/lib/librte_ring/rte_ring_c11_mem.h > > @@ -21,7 +21,8 @@ update_tail(struct rte_ring_headtail *ht, uint32_t > old_val, uint32_t new_val, > > * we need to wait for them to complete > > */ > > if (!single) > > - while (unlikely(ht->tail !=3D old_val)) > > + while (unlikely(old_val !=3D __atomic_load_n(&ht->tail, > > + __ATOMIC_RELAXED))) > > rte_pause(); > > > > __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE); > > -- > > 2.7.4 > >