From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 46D91A00C5 for ; Wed, 14 Sep 2022 21:22:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 212A84021D; Wed, 14 Sep 2022 21:22:31 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id 9702340156 for ; Wed, 14 Sep 2022 21:22:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1663183349; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FZm94Y10J2C/R8Qw10SXquWFc7wzW67eMu0Ibzvsnns=; b=GskeRcTZ3KO9k8LeZBQUHD/aEh0yKsFvQV2YfSAYdLG4g0IciWJO9+dRMNc1CEaIUZGUaW eehrBLTDnWC1GKMKeScnnncdXvGG+XitdfT5cX8nXybIAaIkxFdM6XxbMTs7pIJqTstPTc rJ4edZvqfZwBoWroNNZmC7SYWyRljmk= Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-158-c26-JaGKOjqCzJB08qimkA-1; Wed, 14 Sep 2022 15:22:25 -0400 X-MC-Unique: c26-JaGKOjqCzJB08qimkA-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id A88343803909; Wed, 14 Sep 2022 19:22:24 +0000 (UTC) Received: from [10.39.208.12] (unknown [10.39.208.12]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3F8C32027061; Wed, 14 Sep 2022 19:22:23 +0000 (UTC) Message-ID: Date: Wed, 14 Sep 2022 21:22:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 To: Hernan Vargas , dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, stable@dpdk.org References: <20220820023157.189047-1-hernan.vargas@intel.com> <20220820023157.189047-5-hernan.vargas@intel.com> From: Maxime Coquelin Subject: Re: [PATCH v2 04/37] baseband/acc100: free SW ring mem for reconfiguration In-Reply-To: <20220820023157.189047-5-hernan.vargas@intel.com> X-Scanned-By: MIMEDefang 3.1 on 10.11.54.4 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org On 8/20/22 04:31, Hernan Vargas wrote: > Free base address of unaligned memory for SW rings to manage the missed > corner case when there is a reconfiguration. > > Fixes: 060e7672930 ("baseband/acc100: add queue configuration") > Cc: stable@dpdk.org > > Signed-off-by: Hernan Vargas > --- > drivers/baseband/acc100/rte_acc100_pmd.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c > index 7349bb5bad..349b8be5c1 100644 > --- a/drivers/baseband/acc100/rte_acc100_pmd.c > +++ b/drivers/baseband/acc100/rte_acc100_pmd.c > @@ -340,6 +340,8 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc100_device *d, > int i = 0; > uint32_t q_sw_ring_size = ACC100_MAX_QUEUE_DEPTH * get_desc_len(); > uint32_t dev_sw_ring_size = q_sw_ring_size * num_queues; > + /* Free first in case this is a reconfiguration */ > + rte_free(d->sw_rings_base); > > /* Find an aligned block of memory to store sw rings */ > while (i < ACC100_SW_RING_MEM_ALLOC_ATTEMPTS) { > @@ -768,6 +770,7 @@ acc100_dev_close(struct rte_bbdev *dev) > rte_free(d->tail_ptrs); > rte_free(d->info_ring); > rte_free(d->sw_rings_base); > + rte_free(d->harq_layout); > d->sw_rings_base = NULL; > } > /* Ensure all in flight HW transactions are completed */ > @@ -4665,7 +4668,8 @@ poweron_cleanup(struct rte_bbdev *bbdev, struct acc100_device *d, > } > printf("Number of 5GUL engines %d\n", numEngines); > > - rte_free(d->sw_rings_base); > + if (d->sw_rings_base != NULL) > + rte_free(d->sw_rings_base); No need to check it is not NULL, rte_free() takes care of it. > usleep(ACC100_LONG_WAIT); > } >