From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 900D0A04F3 for ; Wed, 8 Jan 2020 15:47:13 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 77A9B1DA65; Wed, 8 Jan 2020 15:47:13 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 362CA1DA55; Wed, 8 Jan 2020 15:47:10 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Jan 2020 06:47:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,410,1571727600"; d="scan'208";a="215970881" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.237.221.35]) ([10.237.221.35]) by orsmga008.jf.intel.com with ESMTP; 08 Jan 2020 06:47:07 -0800 To: Viacheslav Ovsiienko , dev@dpdk.org Cc: matan@mellanox.com, rasland@mellanox.com, orika@mellanox.com, stable@dpdk.org References: <1576828138-13063-1-git-send-email-viacheslavo@mellanox.com> From: Ferruh Yigit Autocrypt: addr=ferruh.yigit@intel.com; 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charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-stable] [PATCH] net/mlx5: fix matcher metadata register c0 field setup X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" On 12/20/2019 7:48 AM, Viacheslav Ovsiienko wrote: > The metadata register c0 field in the matcher might be split > into two independent fields - the source vport index and META > item value. These fields have no permanent assigned bits, the > configuration is queried from the kernel drivers. > > MLX5_SET configures the specified 32-bit field as whole entity. > For metadata register c0 we should take into account the provided > mask in order to configure the specified subfield bits only. Hi Slava, Is there a more human friendly name for the field instead of "C0"? I don't know what "matcher metadata register" is, what is the impact of the fix? Which functionality was broken now fixed? Does it make sense to reflect it in the patch title / commit log? Same comment for the related patches: net/mlx5: fix register c0 usage for metadata entities net/mlx5: fix metadata item endianness conversion > > Fixes: acfcd5c52f94 ("net/mlx5: update meta register matcher set") > Cc: stable@dpdk.org > > Signed-off-by: Viacheslav Ovsiienko > --- > drivers/net/mlx5/mlx5_flow_dv.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c > index 4c16281..893db3e 100644 > --- a/drivers/net/mlx5/mlx5_flow_dv.c > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > @@ -5742,6 +5742,7 @@ struct field_modify_info modify_tcp[] = { > MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2); > void *misc2_v = > MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2); > + uint32_t temp; > > data &= mask; > switch (reg_type) { > @@ -5754,8 +5755,18 @@ struct field_modify_info modify_tcp[] = { > MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data); > break; > case REG_C_0: > - MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask); > - MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data); > + /* > + * The metadata register C0 field might be divided into > + * source vport index and META item value, we should set > + * this field accorfing to specified mask, not as whole one. > + */ > + temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0); > + temp |= mask; > + MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp); > + temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0); > + temp &= ~mask; > + temp |= data; > + MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp); > break; > case REG_C_1: > MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask); >