* [PATCH 21.11 1/4] net/hns3: extract common function to obtain revision ID
2023-11-23 8:05 [PATCH 21.11 0/4] backport some bugfix for hns3 Huisong Li
@ 2023-11-23 8:05 ` Huisong Li
2023-11-23 8:05 ` [PATCH 21.11 2/4] net/hns3: fix setting DCB capability Huisong Li
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Huisong Li @ 2023-11-23 8:05 UTC (permalink / raw)
To: stable, ktraynor; +Cc: liuyonglong, lihuisong
[ upstream commit f5ed7d99cf45d550a69c1430b7c4a5623a9c774a ]
The code logic of obtaining the revision ID of PCI device is the same
for PF and VF driver. This patch extracts a common interface to do it.
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Acked-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_common.c | 22 ++++++++++++++++++++++
drivers/net/hns3/hns3_common.h | 1 +
drivers/net/hns3/hns3_ethdev.c | 16 ++++------------
drivers/net/hns3/hns3_ethdev_vf.c | 21 ++++-----------------
4 files changed, 31 insertions(+), 29 deletions(-)
diff --git a/drivers/net/hns3/hns3_common.c b/drivers/net/hns3/hns3_common.c
index 6dae69347c..8641b90f67 100644
--- a/drivers/net/hns3/hns3_common.c
+++ b/drivers/net/hns3/hns3_common.c
@@ -789,6 +789,28 @@ hns3_restore_rx_interrupt(struct hns3_hw *hw)
return 0;
}
+int
+hns3_get_pci_revision_id(struct hns3_hw *hw, uint8_t *revision_id)
+{
+ struct rte_pci_device *pci_dev;
+ struct rte_eth_dev *eth_dev;
+ uint8_t revision;
+ int ret;
+
+ eth_dev = &rte_eth_devices[hw->data->port_id];
+ pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+ ret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,
+ HNS3_PCI_REVISION_ID);
+ if (ret != HNS3_PCI_REVISION_ID_LEN) {
+ hns3_err(hw, "failed to read pci revision id, ret = %d", ret);
+ return -EIO;
+ }
+
+ *revision_id = revision;
+
+ return 0;
+}
+
void
hns3_set_default_dev_specifications(struct hns3_hw *hw)
{
diff --git a/drivers/net/hns3/hns3_common.h b/drivers/net/hns3/hns3_common.h
index 1d2ca24194..47d6e34269 100644
--- a/drivers/net/hns3/hns3_common.h
+++ b/drivers/net/hns3/hns3_common.h
@@ -58,6 +58,7 @@ int hns3_map_rx_interrupt(struct rte_eth_dev *dev);
void hns3_unmap_rx_interrupt(struct rte_eth_dev *dev);
int hns3_restore_rx_interrupt(struct hns3_hw *hw);
+int hns3_get_pci_revision_id(struct hns3_hw *hw, uint8_t *revision_id);
void hns3_set_default_dev_specifications(struct hns3_hw *hw);
int hns3_query_dev_specifications(struct hns3_hw *hw);
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index ed85caa7bd..6ae62879b3 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -5,7 +5,6 @@
#include <rte_alarm.h>
#include <rte_bus_pci.h>
#include <ethdev_pci.h>
-#include <rte_pci.h>
#include "hns3_ethdev.h"
#include "hns3_common.h"
@@ -2694,7 +2693,6 @@ hns3_get_capability(struct hns3_hw *hw)
struct hns3_pf *pf = &hns->pf;
struct rte_eth_dev *eth_dev;
uint16_t device_id;
- uint8_t revision;
int ret;
eth_dev = &rte_eth_devices[hw->data->port_id];
@@ -2707,21 +2705,15 @@ hns3_get_capability(struct hns3_hw *hw)
device_id == HNS3_DEV_ID_200G_RDMA)
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1);
- /* Get PCI revision id */
- ret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,
- HNS3_PCI_REVISION_ID);
- if (ret != HNS3_PCI_REVISION_ID_LEN) {
- PMD_INIT_LOG(ERR, "failed to read pci revision id, ret = %d",
- ret);
- return -EIO;
- }
- hw->revision = revision;
+ ret = hns3_get_pci_revision_id(hw, &hw->revision);
+ if (ret)
+ return ret;
ret = hns3_query_mac_stats_reg_num(hw);
if (ret)
return ret;
- if (revision < PCI_REVISION_ID_HIP09_A) {
+ if (hw->revision < PCI_REVISION_ID_HIP09_A) {
hns3_set_default_dev_specifications(hw);
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE;
hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_2US;
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index a125cfbeb9..cea885d7d8 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -6,7 +6,6 @@
#include <rte_alarm.h>
#include <ethdev_pci.h>
#include <rte_io.h>
-#include <rte_pci.h>
#include <rte_vfio.h>
#include "hns3_ethdev.h"
@@ -760,25 +759,13 @@ hns3vf_get_push_lsc_cap(struct hns3_hw *hw)
static int
hns3vf_get_capability(struct hns3_hw *hw)
{
- struct rte_pci_device *pci_dev;
- struct rte_eth_dev *eth_dev;
- uint8_t revision;
int ret;
- eth_dev = &rte_eth_devices[hw->data->port_id];
- pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
-
- /* Get PCI revision id */
- ret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,
- HNS3_PCI_REVISION_ID);
- if (ret != HNS3_PCI_REVISION_ID_LEN) {
- PMD_INIT_LOG(ERR, "failed to read pci revision id, ret = %d",
- ret);
- return -EIO;
- }
- hw->revision = revision;
+ ret = hns3_get_pci_revision_id(hw, &hw->revision);
+ if (ret)
+ return ret;
- if (revision < PCI_REVISION_ID_HIP09_A) {
+ if (hw->revision < PCI_REVISION_ID_HIP09_A) {
hns3_set_default_dev_specifications(hw);
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE;
hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_2US;
--
2.33.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 21.11 2/4] net/hns3: fix setting DCB capability
2023-11-23 8:05 [PATCH 21.11 0/4] backport some bugfix for hns3 Huisong Li
2023-11-23 8:05 ` [PATCH 21.11 1/4] net/hns3: extract common function to obtain revision ID Huisong Li
@ 2023-11-23 8:05 ` Huisong Li
2023-11-23 8:05 ` [PATCH 21.11 3/4] net/hns3: fix LRO offload to report Huisong Li
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Huisong Li @ 2023-11-23 8:05 UTC (permalink / raw)
To: stable, ktraynor; +Cc: liuyonglong, lihuisong
[ upstream commit ac61c444e647298dded80a2ab52966a2dbe22b68 ]
The "hw->capability" is set after querying firmware and version.
But the DCB capability of PF is set in other place.
So this patch moves setting DCB capability to the place where
all capabilities are set.
Fixes: ab2e2e344163 ("net/hns3: get device capability in primary process")
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Jie Hai <haijie1@huawei.com>
---
drivers/net/hns3/hns3_cmd.c | 25 +++++++++++++++++++++++++
drivers/net/hns3/hns3_ethdev.c | 13 -------------
2 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 3495e2acc1..13f7e37511 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -523,6 +523,28 @@ hns3_build_api_caps(void)
return rte_cpu_to_le_32(api_caps);
}
+static void
+hns3_set_dcb_capability(struct hns3_hw *hw)
+{
+ struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+ struct rte_pci_device *pci_dev;
+ struct rte_eth_dev *eth_dev;
+ uint16_t device_id;
+
+ if (hns->is_vf)
+ return;
+
+ eth_dev = &rte_eth_devices[hw->data->port_id];
+ pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+ device_id = pci_dev->id.device_id;
+
+ if (device_id == HNS3_DEV_ID_25GE_RDMA ||
+ device_id == HNS3_DEV_ID_50GE_RDMA ||
+ device_id == HNS3_DEV_ID_100G_RDMA_MACSEC ||
+ device_id == HNS3_DEV_ID_200G_RDMA)
+ hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1);
+}
+
static int
hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw)
{
@@ -540,6 +562,9 @@ hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw)
return ret;
hw->fw_version = rte_le_to_cpu_32(resp->firmware);
+
+ hns3_set_dcb_capability(hw);
+
/*
* Make sure mask the capability before parse capability because it
* may overwrite resp's data.
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 6ae62879b3..bf612b1830 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2689,22 +2689,9 @@ static int
hns3_get_capability(struct hns3_hw *hw)
{
struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
- struct rte_pci_device *pci_dev;
struct hns3_pf *pf = &hns->pf;
- struct rte_eth_dev *eth_dev;
- uint16_t device_id;
int ret;
- eth_dev = &rte_eth_devices[hw->data->port_id];
- pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
- device_id = pci_dev->id.device_id;
-
- if (device_id == HNS3_DEV_ID_25GE_RDMA ||
- device_id == HNS3_DEV_ID_50GE_RDMA ||
- device_id == HNS3_DEV_ID_100G_RDMA_MACSEC ||
- device_id == HNS3_DEV_ID_200G_RDMA)
- hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1);
-
ret = hns3_get_pci_revision_id(hw, &hw->revision);
if (ret)
return ret;
--
2.33.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 21.11 3/4] net/hns3: fix LRO offload to report
2023-11-23 8:05 [PATCH 21.11 0/4] backport some bugfix for hns3 Huisong Li
2023-11-23 8:05 ` [PATCH 21.11 1/4] net/hns3: extract common function to obtain revision ID Huisong Li
2023-11-23 8:05 ` [PATCH 21.11 2/4] net/hns3: fix setting DCB capability Huisong Li
@ 2023-11-23 8:05 ` Huisong Li
2023-11-23 8:05 ` [PATCH 21.11 4/4] net/hns3: fix crash for NEON and SVE Huisong Li
2023-11-23 10:52 ` [PATCH 21.11 0/4] backport some bugfix for hns3 Kevin Traynor
4 siblings, 0 replies; 6+ messages in thread
From: Huisong Li @ 2023-11-23 8:05 UTC (permalink / raw)
To: stable, ktraynor; +Cc: liuyonglong, lihuisong
[ upstream commit a4b2c6815abd3e39daca2e2c93334b813e6a0be4 ]
Some network engines, like part of HIP09, may not support LRO
offload, but this offload capability is also reported to user.
So this patch determines whether driver reports this capability
based on the capabilities from firmware.
In addition, some network engines, like HIP08, always support LRO
offload and their firmware don't report this capability. So this
patch has to move getting revision ID codes to earlier stage and set
default capabilities for these network engines based on revision ID.
Fixes: ab2e2e344163 ("net/hns3: get device capability in primary process")
Fixes: f5ed7d99cf45 ("net/hns3: extract common function to obtain revision ID")
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Jie Hai <haijie1@huawei.com>
---
drivers/net/hns3/hns3_cmd.c | 17 ++++++++++++++++-
drivers/net/hns3/hns3_cmd.h | 1 +
drivers/net/hns3/hns3_common.c | 5 +++--
drivers/net/hns3/hns3_ethdev.c | 8 ++++----
drivers/net/hns3/hns3_ethdev.h | 1 +
drivers/net/hns3/hns3_ethdev_vf.c | 8 ++++----
drivers/net/hns3/hns3_rxtx.c | 3 +++
7 files changed, 32 insertions(+), 11 deletions(-)
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 13f7e37511..9b721ccc25 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -511,6 +511,8 @@ hns3_parse_capability(struct hns3_hw *hw,
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_RAS_IMP_B, 1);
if (hns3_get_bit(caps, HNS3_CAPS_TM_B))
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_TM_B, 1);
+ if (hns3_get_bit(caps, HNS3_CAPS_GRO_B))
+ hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_GRO_B, 1);
}
static uint32_t
@@ -545,6 +547,19 @@ hns3_set_dcb_capability(struct hns3_hw *hw)
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1);
}
+static void
+hns3_set_default_capability(struct hns3_hw *hw)
+{
+ hns3_set_dcb_capability(hw);
+
+ /*
+ * The firmware of the network engines with HIP08 do not report some
+ * capabilities, like GRO. Set default capabilities for it.
+ */
+ if (hw->revision < PCI_REVISION_ID_HIP09_A)
+ hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_GRO_B, 1);
+}
+
static int
hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw)
{
@@ -563,7 +578,7 @@ hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw)
hw->fw_version = rte_le_to_cpu_32(resp->firmware);
- hns3_set_dcb_capability(hw);
+ hns3_set_default_capability(hw);
/*
* Make sure mask the capability before parse capability because it
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index 79b9023602..e1fab05489 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -319,6 +319,7 @@ enum HNS3_CAPS_BITS {
HNS3_CAPS_RAS_IMP_B,
HNS3_CAPS_RXD_ADV_LAYOUT_B = 15,
HNS3_CAPS_TM_B = 19,
+ HNS3_CAPS_GRO_B = 20,
};
/* Capabilities of VF dependent on the PF */
diff --git a/drivers/net/hns3/hns3_common.c b/drivers/net/hns3/hns3_common.c
index 8641b90f67..ace5be01d5 100644
--- a/drivers/net/hns3/hns3_common.c
+++ b/drivers/net/hns3/hns3_common.c
@@ -70,8 +70,7 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
RTE_ETH_RX_OFFLOAD_SCATTER |
RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
RTE_ETH_RX_OFFLOAD_VLAN_FILTER |
- RTE_ETH_RX_OFFLOAD_RSS_HASH |
- RTE_ETH_RX_OFFLOAD_TCP_LRO);
+ RTE_ETH_RX_OFFLOAD_RSS_HASH);
info->tx_offload_capa = (RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
@@ -99,6 +98,8 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
if (hns3_dev_get_support(hw, PTP))
info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TIMESTAMP;
+ if (hns3_dev_get_support(hw, GRO))
+ info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
info->rx_desc_lim = (struct rte_eth_desc_lim) {
.nb_max = HNS3_MAX_RING_DESC,
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index bf612b1830..d71f032bda 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2692,10 +2692,6 @@ hns3_get_capability(struct hns3_hw *hw)
struct hns3_pf *pf = &hns->pf;
int ret;
- ret = hns3_get_pci_revision_id(hw, &hw->revision);
- if (ret)
- return ret;
-
ret = hns3_query_mac_stats_reg_num(hw);
if (ret)
return ret;
@@ -4560,6 +4556,10 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
/* Get hardware io base address from pcie BAR2 IO space */
hw->io_base = pci_dev->mem_resource[2].addr;
+ ret = hns3_get_pci_revision_id(hw, &hw->revision);
+ if (ret)
+ return ret;
+
/* Firmware command queue initialize */
ret = hns3_cmd_init_queue(hw);
if (ret) {
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 3496be6f73..1f435ea497 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -891,6 +891,7 @@ enum {
HNS3_DEV_SUPPORT_RAS_IMP_B,
HNS3_DEV_SUPPORT_TM_B,
HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B,
+ HNS3_DEV_SUPPORT_GRO_B,
};
#define hns3_dev_get_support(hw, _name) \
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index cea885d7d8..59e71c9614 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -761,10 +761,6 @@ hns3vf_get_capability(struct hns3_hw *hw)
{
int ret;
- ret = hns3_get_pci_revision_id(hw, &hw->revision);
- if (ret)
- return ret;
-
if (hw->revision < PCI_REVISION_ID_HIP09_A) {
hns3_set_default_dev_specifications(hw);
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE;
@@ -1452,6 +1448,10 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)
/* Get hardware io base address from pcie BAR2 IO space */
hw->io_base = pci_dev->mem_resource[2].addr;
+ ret = hns3_get_pci_revision_id(hw, &hw->revision);
+ if (ret)
+ return ret;
+
/* Firmware command queue initialize */
ret = hns3_cmd_init_queue(hw);
if (ret) {
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index a758300060..00f71b43cc 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -3129,6 +3129,9 @@ hns3_config_gro(struct hns3_hw *hw, bool en)
struct hns3_cmd_desc desc;
int ret;
+ if (!hns3_dev_get_support(hw, GRO))
+ return 0;
+
hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_GRO_GENERIC_CONFIG, false);
req = (struct hns3_cfg_gro_status_cmd *)desc.data;
--
2.33.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 21.11 4/4] net/hns3: fix crash for NEON and SVE
2023-11-23 8:05 [PATCH 21.11 0/4] backport some bugfix for hns3 Huisong Li
` (2 preceding siblings ...)
2023-11-23 8:05 ` [PATCH 21.11 3/4] net/hns3: fix LRO offload to report Huisong Li
@ 2023-11-23 8:05 ` Huisong Li
2023-11-23 10:52 ` [PATCH 21.11 0/4] backport some bugfix for hns3 Kevin Traynor
4 siblings, 0 replies; 6+ messages in thread
From: Huisong Li @ 2023-11-23 8:05 UTC (permalink / raw)
To: stable, ktraynor; +Cc: liuyonglong, lihuisong
[ upstream commit 01843ab2f2fc8c3137258ec39b2cb6f62ba7b8a2 ]
Driver may fail to allocate bulk mbufs for Neon and SVE when rearm
mbuf. Currently, driver keeps going to handle packets even if there
isn't available descriptors to receive packets at this moment.
As a result, driver probably fills the mbufs with invalid data to
application and accesses to illegal address because of the VLD bit
of the descriptor at the "rx_rearm_start" position still being set.
So driver has to clear VLD bit for this descriptor in this scenario
in case of receiving packets later.
In addition, it is possible that the sum of the "rx_rearm_nb" and
"rx_rearm_start" is greater than total descriptor number of Rx queue
in the above scenario. So the index of rxq->sw_ring[] to set mbuf
pointer to NULL should also be fixed to avoid out-of-bounds memory
access.
Fixes: a3d4f4d291d7 ("net/hns3: support NEON Rx")
Fixes: f81a18f49152 ("net/hns3: fix mbuf leakage when RxQ started after reset")
Signed-off-by: Huisong Li <lihuisong@huawei.com>
---
drivers/net/hns3/hns3_rxtx.c | 2 +-
drivers/net/hns3/hns3_rxtx_vec.c | 5 +++++
drivers/net/hns3/hns3_rxtx_vec_sve.c | 5 +++++
3 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 00f71b43cc..906e73387a 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -51,7 +51,7 @@ hns3_rx_queue_release_mbufs(struct hns3_rx_queue *rxq)
}
}
for (i = 0; i < rxq->rx_rearm_nb; i++)
- rxq->sw_ring[rxq->rx_rearm_start + i].mbuf = NULL;
+ rxq->sw_ring[(rxq->rx_rearm_start + i) % rxq->nb_rx_desc].mbuf = NULL;
}
for (i = 0; i < rxq->bulk_mbuf_num; i++)
diff --git a/drivers/net/hns3/hns3_rxtx_vec.c b/drivers/net/hns3/hns3_rxtx_vec.c
index 153866cf03..5c172b1abf 100644
--- a/drivers/net/hns3/hns3_rxtx_vec.c
+++ b/drivers/net/hns3/hns3_rxtx_vec.c
@@ -66,6 +66,11 @@ hns3_rxq_rearm_mbuf(struct hns3_rx_queue *rxq)
if (unlikely(rte_mempool_get_bulk(rxq->mb_pool, (void *)rxep,
HNS3_DEFAULT_RXQ_REARM_THRESH) < 0)) {
+ /*
+ * Clear VLD bit for the first descriptor rearmed in case
+ * of going to receive packets later.
+ */
+ rxdp[0].rx.bd_base_info = 0;
rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed++;
return;
}
diff --git a/drivers/net/hns3/hns3_rxtx_vec_sve.c b/drivers/net/hns3/hns3_rxtx_vec_sve.c
index f09a81dbd5..abab91c4ab 100644
--- a/drivers/net/hns3/hns3_rxtx_vec_sve.c
+++ b/drivers/net/hns3/hns3_rxtx_vec_sve.c
@@ -248,6 +248,11 @@ hns3_rxq_rearm_mbuf_sve(struct hns3_rx_queue *rxq)
if (unlikely(rte_mempool_get_bulk(rxq->mb_pool, (void *)rxep,
HNS3_DEFAULT_RXQ_REARM_THRESH) < 0)) {
+ /*
+ * Clear VLD bit for the first descriptor rearmed in case
+ * of going to receive packets later.
+ */
+ rxdp[0].rx.bd_base_info = 0;
rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed++;
return;
}
--
2.33.0
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 21.11 0/4] backport some bugfix for hns3
2023-11-23 8:05 [PATCH 21.11 0/4] backport some bugfix for hns3 Huisong Li
` (3 preceding siblings ...)
2023-11-23 8:05 ` [PATCH 21.11 4/4] net/hns3: fix crash for NEON and SVE Huisong Li
@ 2023-11-23 10:52 ` Kevin Traynor
4 siblings, 0 replies; 6+ messages in thread
From: Kevin Traynor @ 2023-11-23 10:52 UTC (permalink / raw)
To: Huisong Li, stable; +Cc: liuyonglong
On 23/11/2023 08:05, Huisong Li wrote:
> The patch [2/4] and [3/4] depend on patch [1/4]. So have to backport it.
>
> Huisong Li (4):
> net/hns3: extract common function to obtain revision ID
> net/hns3: fix setting DCB capability
> net/hns3: fix LRO offload to report
> net/hns3: fix crash for NEON and SVE
>
> drivers/net/hns3/hns3_cmd.c | 40 ++++++++++++++++++++++++++++
> drivers/net/hns3/hns3_cmd.h | 1 +
> drivers/net/hns3/hns3_common.c | 27 +++++++++++++++++--
> drivers/net/hns3/hns3_common.h | 1 +
> drivers/net/hns3/hns3_ethdev.c | 31 ++++-----------------
> drivers/net/hns3/hns3_ethdev.h | 1 +
> drivers/net/hns3/hns3_ethdev_vf.c | 23 ++++------------
> drivers/net/hns3/hns3_rxtx.c | 5 +++-
> drivers/net/hns3/hns3_rxtx_vec.c | 5 ++++
> drivers/net/hns3/hns3_rxtx_vec_sve.c | 5 ++++
> 10 files changed, 92 insertions(+), 47 deletions(-)
>
Applied series to 21.11 branch. Thanks for backporting.
^ permalink raw reply [flat|nested] 6+ messages in thread