* [dpdk-test-report] |WARNING| [PATCH 02/16] e1000/base: increase PHY PLL clock gate timing
[not found] <1479921780-9813-3-git-send-email-wenzhuo.lu@intel.com>
@ 2016-11-24 1:32 ` checkpatch
0 siblings, 0 replies; only message in thread
From: checkpatch @ 2016-11-24 1:32 UTC (permalink / raw)
To: test-report; +Cc: Wenzhuo Lu
Test-Label: checkpatch
Test-Status: WARNING
http://dpdk.org/patch/17210
_coding style issues_
WARNING:TABSTOP: Statements should start on a tabstop
#73: FILE: drivers/net/e1000/base/e1000_ich8lan.c:1503:
+ }
total: 0 errors, 1 warnings, 0 checks, 30 lines checked
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2016-11-24 1:32 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <1479921780-9813-3-git-send-email-wenzhuo.lu@intel.com>
2016-11-24 1:32 ` [dpdk-test-report] |WARNING| [PATCH 02/16] e1000/base: increase PHY PLL clock gate timing checkpatch
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).