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From: checkpatch@dpdk.org
To: test-report@dpdk.org
Cc: Wenzhuo Lu <wenzhuo.lu@intel.com>
Subject: [dpdk-test-report] |WARNING| pw48668 [v3, 06/34] net/ice: Add control queue information
Date: Wed, 12 Dec 2018 07:56:21 +0100 (CET)	[thread overview]
Message-ID: <20181212065621.22AFB1B3B7@dpdk.org> (raw)
In-Reply-To: <1544598004-27099-7-git-send-email-wenzhuo.lu@intel.com>

Test-Label: checkpatch
Test-Status: WARNING
http://dpdk.org/patch/48668

_coding style issues_


CHECK:MACRO_ARG_REUSE: Macro argument reuse 'qinfo' - possible side-effects?
#41: FILE: drivers/net/ice/base/ice_controlq.c:8:
+#define ICE_CQ_INIT_REGS(qinfo, prefix)				\
+do {								\
+	(qinfo)->sq.head = prefix##_ATQH;			\
+	(qinfo)->sq.tail = prefix##_ATQT;			\
+	(qinfo)->sq.len = prefix##_ATQLEN;			\
+	(qinfo)->sq.bah = prefix##_ATQBAH;			\
+	(qinfo)->sq.bal = prefix##_ATQBAL;			\
+	(qinfo)->sq.len_mask = prefix##_ATQLEN_ATQLEN_M;	\
+	(qinfo)->sq.len_ena_mask = prefix##_ATQLEN_ATQENABLE_M;	\
+	(qinfo)->sq.head_mask = prefix##_ATQH_ATQH_M;		\
+	(qinfo)->rq.head = prefix##_ARQH;			\
+	(qinfo)->rq.tail = prefix##_ARQT;			\
+	(qinfo)->rq.len = prefix##_ARQLEN;			\
+	(qinfo)->rq.bah = prefix##_ARQBAH;			\
+	(qinfo)->rq.bal = prefix##_ARQBAL;			\
+	(qinfo)->rq.len_mask = prefix##_ARQLEN_ARQLEN_M;	\
+	(qinfo)->rq.len_ena_mask = prefix##_ARQLEN_ARQENABLE_M;	\
+	(qinfo)->rq.head_mask = prefix##_ARQH_ARQH_M;		\
+} while (0)

CHECK:MACRO_ARG_REUSE: Macro argument reuse 'hw' - possible side-effects?
#431: FILE: drivers/net/ice/base/ice_controlq.c:398:
+#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
+do {									\
+	int i;								\
+	/* free descriptors */						\
+	for (i = 0; i < (qi)->num_##ring##_entries; i++)		\
+		if ((qi)->ring.r.ring##_bi[i].pa)			\
+			ice_free_dma_mem((hw),				\
+					 &(qi)->ring.r.ring##_bi[i]);	\
+	/* free the buffer info list */					\
+	if ((qi)->ring.cmd_buf)						\
+		ice_free(hw, (qi)->ring.cmd_buf);			\
+	/* free dma head */						\
+	ice_free(hw, (qi)->ring.dma_head);				\
+} while (0)

CHECK:MACRO_ARG_REUSE: Macro argument reuse 'qi' - possible side-effects?
#431: FILE: drivers/net/ice/base/ice_controlq.c:398:
+#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
+do {									\
+	int i;								\
+	/* free descriptors */						\
+	for (i = 0; i < (qi)->num_##ring##_entries; i++)		\
+		if ((qi)->ring.r.ring##_bi[i].pa)			\
+			ice_free_dma_mem((hw),				\
+					 &(qi)->ring.r.ring##_bi[i]);	\
+	/* free the buffer info list */					\
+	if ((qi)->ring.cmd_buf)						\
+		ice_free(hw, (qi)->ring.cmd_buf);			\
+	/* free dma head */						\
+	ice_free(hw, (qi)->ring.dma_head);				\
+} while (0)

CHECK:MACRO_ARG_REUSE: Macro argument reuse 'ring' - possible side-effects?
#431: FILE: drivers/net/ice/base/ice_controlq.c:398:
+#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
+do {									\
+	int i;								\
+	/* free descriptors */						\
+	for (i = 0; i < (qi)->num_##ring##_entries; i++)		\
+		if ((qi)->ring.r.ring##_bi[i].pa)			\
+			ice_free_dma_mem((hw),				\
+					 &(qi)->ring.r.ring##_bi[i]);	\
+	/* free the buffer info list */					\
+	if ((qi)->ring.cmd_buf)						\
+		ice_free(hw, (qi)->ring.cmd_buf);			\
+	/* free dma head */						\
+	ice_free(hw, (qi)->ring.dma_head);				\
+} while (0)

CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'ring' may be better as '(ring)' to avoid precedence issues
#431: FILE: drivers/net/ice/base/ice_controlq.c:398:
+#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
+do {									\
+	int i;								\
+	/* free descriptors */						\
+	for (i = 0; i < (qi)->num_##ring##_entries; i++)		\
+		if ((qi)->ring.r.ring##_bi[i].pa)			\
+			ice_free_dma_mem((hw),				\
+					 &(qi)->ring.r.ring##_bi[i]);	\
+	/* free the buffer info list */					\
+	if ((qi)->ring.cmd_buf)						\
+		ice_free(hw, (qi)->ring.cmd_buf);			\
+	/* free dma head */						\
+	ice_free(hw, (qi)->ring.dma_head);				\
+} while (0)

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#729: FILE: drivers/net/ice/base/ice_controlq.c:696:
+#if 0

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#740: FILE: drivers/net/ice/base/ice_controlq.c:707:
+#if 0

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#850: FILE: drivers/net/ice/base/ice_controlq.c:817:
+#if 0

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#870: FILE: drivers/net/ice/base/ice_controlq.c:837:
+#if 0

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#928: FILE: drivers/net/ice/base/ice_controlq.c:895:
+#if 0

WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 8)
#930: FILE: drivers/net/ice/base/ice_controlq.c:897:
+	if (!details->postpone)
[...]
+	wr32(hw, cq->sq.tail, cq->sq.next_to_use);

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#934: FILE: drivers/net/ice/base/ice_controlq.c:901:
+#if 0

WARNING:BRACES: braces {} are not necessary for single statement blocks
#938: FILE: drivers/net/ice/base/ice_controlq.c:905:
+	if (!details->async && !details->postpone) {
+		/* FIXME - handle this case? */
+	}

WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (8, 12)
#995: FILE: drivers/net/ice/base/ice_controlq.c:962:
+	if (!cmd_completed) {
[...]
+	    (!details->async && !details->postpone)) {

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#996: FILE: drivers/net/ice/base/ice_controlq.c:963:
+#if 0

WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#1117: FILE: drivers/net/ice/base/ice_controlq.c:1084:
+#if 0

CHECK:MACRO_ARG_REUSE: Macro argument reuse 'R' - possible side-effects?
#1155: FILE: drivers/net/ice/base/ice_controlq.h:18:
+#define ICE_CTL_Q_DESC_UNUSED(R) \
+	(u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
+	      (R)->next_to_clean - (R)->next_to_use - 1)

total: 0 errors, 11 warnings, 6 checks, 1195 lines checked

           reply	other threads:[~2018-12-12  6:56 UTC|newest]

Thread overview: expand[flat|nested]  mbox.gz  Atom feed
 [parent not found: <1544598004-27099-7-git-send-email-wenzhuo.lu@intel.com>]

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