Test-Label: iol-testing Test-Status: WARNING http://dpdk.org/patch/97727 _apply patch failure_ Submitter: Nithin Dabilpuram Date: Thursday, September 02 2021 02:15:05 Applied on: CommitID:eeedef704c11bd74c367d62838700bdb8e5b573f Apply patch set 97727-97753 failed: Checking patch drivers/common/cnxk/roc_cpt.h... Hunk #1 succeeded at 143 (offset -11 lines). Checking patch drivers/common/cnxk/roc_cpt_debug.c... Checking patch drivers/common/cnxk/version.map... error: while searching for: roc_cpt_lf_fini; roc_cpt_lfs_print; roc_cpt_lmtline_init; roc_cpt_rxc_time_cfg; roc_error_msg_get; roc_hash_sha1_gen; error: patch failed: drivers/common/cnxk/version.map:66 Applied patch drivers/common/cnxk/roc_cpt.h cleanly. Applied patch drivers/common/cnxk/roc_cpt_debug.c cleanly. Applying patch drivers/common/cnxk/version.map with 1 reject... Rejected hunk #1. diff a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map (rejected hunks) @@ -66,6 +66,7 @@ INTERNAL { roc_cpt_lf_fini; roc_cpt_lfs_print; roc_cpt_lmtline_init; + roc_cpt_parse_hdr_dump; roc_cpt_rxc_time_cfg; roc_error_msg_get; roc_hash_sha1_gen; Checking patch drivers/common/cnxk/meson.build... Hunk #1 succeeded at 27 (offset -1 lines). Checking patch drivers/common/cnxk/roc_api.h... error: while searching for: /* HASH computation */ #include "roc_hash.h" #endif /* _ROC_API_H_ */ error: patch failed: drivers/common/cnxk/roc_api.h:129 Checking patch drivers/common/cnxk/roc_irq.c... Checking patch drivers/common/cnxk/roc_nix_inl.h... Checking patch drivers/common/cnxk/roc_nix_inl_dev_irq.c... Checking patch drivers/common/cnxk/roc_nix_inl_priv.h... Checking patch drivers/common/cnxk/roc_platform.h... Checking patch drivers/common/cnxk/roc_priv.h... Applied patch drivers/common/cnxk/meson.build cleanly. Applying patch drivers/common/cnxk/roc_api.h with 1 reject... Rejected hunk #1. Applied patch drivers/common/cnxk/roc_irq.c cleanly. Applied patch drivers/common/cnxk/roc_nix_inl.h cleanly. Applied patch drivers/common/cnxk/roc_nix_inl_dev_irq.c cleanly. Applied patch drivers/common/cnxk/roc_nix_inl_priv.h cleanly. Applied patch drivers/common/cnxk/roc_platform.h cleanly. Applied patch drivers/common/cnxk/roc_priv.h cleanly. diff a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h (rejected hunks) @@ -129,4 +129,7 @@ /* HASH computation */ #include "roc_hash.h" +/* NIX Inline dev */ +#include "roc_nix_inl.h" + #endif /* _ROC_API_H_ */ Checking patch drivers/common/cnxk/meson.build... error: drivers/common/cnxk/meson.build: does not match index Checking patch drivers/common/cnxk/roc_api.h... Checking patch drivers/common/cnxk/roc_cpt.c... Checking patch drivers/common/cnxk/roc_idev.c... Checking patch drivers/common/cnxk/roc_idev_priv.h... Checking patch drivers/common/cnxk/roc_nix_debug.c... Checking patch drivers/common/cnxk/roc_nix_inl.h... error: drivers/common/cnxk/roc_nix_inl.h: does not exist in index Checking patch drivers/common/cnxk/roc_nix_inl_dev.c... Checking patch drivers/common/cnxk/roc_nix_inl_priv.h... error: drivers/common/cnxk/roc_nix_inl_priv.h: does not exist in index Checking patch drivers/common/cnxk/roc_platform.h... error: drivers/common/cnxk/roc_platform.h: does not match index Checking patch drivers/common/cnxk/version.map... Hunk #1 succeeded at 96 (offset -4 lines). Applied patch drivers/common/cnxk/roc_api.h cleanly. Applied patch drivers/common/cnxk/roc_cpt.c cleanly. Applied patch drivers/common/cnxk/roc_idev.c cleanly. Applied patch drivers/common/cnxk/roc_idev_priv.h cleanly. Applied patch drivers/common/cnxk/roc_nix_debug.c cleanly. Applied patch drivers/common/cnxk/roc_nix_inl_dev.c cleanly. Applied patch drivers/common/cnxk/version.map cleanly. Checking patch drivers/common/cnxk/hw/cpt.h... Checking patch drivers/common/cnxk/meson.build... error: drivers/common/cnxk/meson.build: does not match index Checking patch drivers/common/cnxk/roc_api.h... error: drivers/common/cnxk/roc_api.h: does not match index Checking patch drivers/common/cnxk/roc_constants.h... Checking patch drivers/common/cnxk/roc_io.h... Checking patch drivers/common/cnxk/roc_io_generic.h... Checking patch drivers/common/cnxk/roc_nix.h... Checking patch drivers/common/cnxk/roc_nix_debug.c... error: drivers/common/cnxk/roc_nix_debug.c: does not match index Checking patch drivers/common/cnxk/roc_nix_inl.c... Checking patch drivers/common/cnxk/roc_nix_inl.h... error: drivers/common/cnxk/roc_nix_inl.h: does not exist in index Checking patch drivers/common/cnxk/roc_nix_priv.h... Checking patch drivers/common/cnxk/roc_npc.c... Checking patch drivers/common/cnxk/version.map... error: drivers/common/cnxk/version.map: does not match index Applied patch drivers/common/cnxk/hw/cpt.h cleanly. Applied patch drivers/common/cnxk/roc_constants.h cleanly. Applied patch drivers/common/cnxk/roc_io.h cleanly. Applied patch drivers/common/cnxk/roc_io_generic.h cleanly. Applied patch drivers/common/cnxk/roc_nix.h cleanly. Applied patch drivers/common/cnxk/roc_nix_inl.c cleanly. Applied patch drivers/common/cnxk/roc_nix_priv.h cleanly. Applied patch drivers/common/cnxk/roc_npc.c cleanly. Checking patch drivers/common/cnxk/roc_cpt.c... error: drivers/common/cnxk/roc_cpt.c: does not match index Checking patch drivers/common/cnxk/roc_cpt_debug.c... error: drivers/common/cnxk/roc_cpt_debug.c: does not match index Checking patch drivers/common/cnxk/roc_cpt_priv.h... Hunk #1 succeeded at 37 (offset 6 lines). Applied patch drivers/common/cnxk/roc_cpt_priv.h cleanly. Checking patch drivers/common/cnxk/hw/cpt.h... error: drivers/common/cnxk/hw/cpt.h: does not match index Checking patch drivers/common/cnxk/roc_cpt.c... error: drivers/common/cnxk/roc_cpt.c: does not match index Checking patch drivers/common/cnxk/roc_cpt.h... error: drivers/common/cnxk/roc_cpt.h: does not match index Checking patch drivers/common/cnxk/roc_nix.h... error: drivers/common/cnxk/roc_nix.h: does not match index Checking patch drivers/common/cnxk/roc_nix_queue.c... Applied patch drivers/common/cnxk/roc_nix_queue.c cleanly. Checking patch drivers/common/cnxk/roc_nix_inl.h... error: drivers/common/cnxk/roc_nix_inl.h: does not exist in index Checking patch drivers/common/cnxk/roc_nix_inl_dev.c... error: drivers/common/cnxk/roc_nix_inl_dev.c: does not exist in index Checking patch drivers/common/cnxk/roc_nix_inl_priv.h... error: drivers/common/cnxk/roc_nix_inl_priv.h: does not exist in index Checking patch drivers/common/cnxk/roc_npc_mcam.c... Applied patch drivers/common/cnxk/roc_npc_mcam.c cleanly. Checking patch drivers/event/cnxk/cn9k_eventdev.c... error: while searching for: #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id) #define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \ deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \ error: patch failed: drivers/event/cnxk/cn9k_eventdev.c:10 error: while searching for: { struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); /* Single WS modes */ const event_dequeue_t sso_hws_deq[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_ca_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_seg_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_ca_seg_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; /* Dual WS modes */ const event_dequeue_t sso_hws_dual_deq[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_dual_deq_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_dual_deq_tmo[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_dual_deq_tmo_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_burst_##name, NIX_RX_FASTPATH_MODES #unde error: patch failed: drivers/event/cnxk/cn9k_eventdev.c:329 Checking patch drivers/event/cnxk/cn9k_worker.h... error: while searching for: uint16_t __rte_hot cn9k_sso_hws_dual_ca_enq(void *port, struct rte_event ev[], uint16_t nb_events); #define R(name, f5, f4, f3, f2, f1, f0, flags) \ uint16_t __rte_hot cn9k_sso_hws_deq_##name( \ void *port, struct rte_event *ev, uint64_t timeout_ticks); \ uint16_t __rte_hot cn9k_sso_hws_deq_burst_##name( \ error: patch failed: drivers/event/cnxk/cn9k_worker.h:380 Hunk #3 succeeded at 395 (offset -23 lines). Checking patch drivers/event/cnxk/cn9k_worker_deq.c... Checking patch drivers/event/cnxk/cn9k_worker_deq_burst.c... Checking patch drivers/event/cnxk/cn9k_worker_deq_ca.c... error: drivers/event/cnxk/cn9k_worker_deq_ca.c: does not exist in index Checking patch drivers/event/cnxk/cn9k_worker_deq_tmo.c... Checking patch drivers/event/cnxk/cn9k_worker_dual_deq.c... Checking patch drivers/event/cnxk/cn9k_worker_dual_deq_burst.c... Checking patch drivers/event/cnxk/cn9k_worker_dual_deq_ca.c... error: drivers/event/cnxk/cn9k_worker_dual_deq_ca.c: does not exist in index Checking patch drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c... Checking patch drivers/net/cnxk/cn9k_rx.c... Checking patch drivers/net/cnxk/cn9k_rx.h... Hunk #1 succeeded at 165 (offset -1 lines). Hunk #2 succeeded at 272 (offset -1 lines). Hunk #3 succeeded at 288 (offset -1 lines). Hunk #4 succeeded at 751 (offset -1 lines). Checking patch drivers/net/cnxk/cn9k_rx_mseg.c... Checking patch drivers/net/cnxk/cn9k_rx_vec.c... Checking patch drivers/net/cnxk/cn9k_rx_vec_mseg.c... Checking patch drivers/net/cnxk/cnxk_ethdev.h... Applying patch drivers/event/cnxk/cn9k_eventdev.c with 2 rejects... Rejected hunk #1. Rejected hunk #2. Applying patch drivers/event/cnxk/cn9k_worker.h with 1 reject... Hunk #1 applied cleanly. Rejected hunk #2. Hunk #3 applied cleanly. Applied patch drivers/event/cnxk/cn9k_worker_deq.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_deq_burst.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_deq_tmo.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_dual_deq.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_dual_deq_burst.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c cleanly. Applied patch drivers/net/cnxk/cn9k_rx.c cleanly. Applied patch drivers/net/cnxk/cn9k_rx.h cleanly. Applied patch drivers/net/cnxk/cn9k_rx_mseg.c cleanly. Applied patch drivers/net/cnxk/cn9k_rx_vec.c cleanly. Applied patch drivers/net/cnxk/cn9k_rx_vec_mseg.c cleanly. Applied patch drivers/net/cnxk/cnxk_ethdev.h cleanly. diff a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c (rejected hunks) @@ -10,7 +10,8 @@ #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id) #define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \ - deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ + deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \ @@ -329,178 +330,184 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) { struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); /* Single WS modes */ - const event_dequeue_t sso_hws_deq[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_##name, + const event_dequeue_t sso_hws_deq[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_burst_##name, + const event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_##name, + const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_burst_##name, + const event_dequeue_burst_t + sso_hws_deq_tmo_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_##name, + const event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_ca_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_burst_##name, + const event_dequeue_burst_t + sso_hws_deq_ca_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_##name, + const event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_burst_##name, + const event_dequeue_burst_t + sso_hws_deq_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_##name, + const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_burst_##name, + sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_##name, + const event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_deq_ca_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_burst_##name, + sso_hws_deq_ca_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; /* Dual WS modes */ - const event_dequeue_t sso_hws_dual_deq[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_##name, + const event_dequeue_t sso_hws_dual_deq[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_dual_deq_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_burst_##name, + const event_dequeue_burst_t + sso_hws_dual_deq_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_dual_deq_tmo[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_##name, + const event_dequeue_t sso_hws_dual_deq_tmo[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_dual_deq_tmo_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_burst_##name, + sso_hws_dual_deq_tmo_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_dual_deq_ca[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_##name, + const event_dequeue_t sso_hws_dual_deq_ca[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_dual_deq_ca_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_burst_##name, + sso_hws_dual_deq_ca_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_dual_deq_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_##name, + const event_dequeue_t sso_hws_dual_deq_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_dual_deq_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_burst_##name, + sso_hws_dual_deq_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_dual_deq_tmo_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_seg_##name, + const event_dequeue_t sso_hws_dual_deq_tmo_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_dual_deq_tmo_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_seg_burst_##name, + sso_hws_dual_deq_tmo_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = \ + cn9k_sso_hws_dual_deq_tmo_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_dual_deq_ca_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_seg_##name, + const event_dequeue_t sso_hws_dual_deq_ca_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_dual_deq_ca_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_seg_burst_##name, + sso_hws_dual_deq_ca_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = \ + cn9k_sso_hws_dual_deq_ca_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; diff a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h (rejected hunks) @@ -380,7 +383,7 @@ uint16_t __rte_hot cn9k_sso_hws_ca_enq(void *port, struct rte_event ev[], uint16_t __rte_hot cn9k_sso_hws_dual_ca_enq(void *port, struct rte_event ev[], uint16_t nb_events); -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ uint16_t __rte_hot cn9k_sso_hws_deq_##name( \ void *port, struct rte_event *ev, uint64_t timeout_ticks); \ uint16_t __rte_hot cn9k_sso_hws_deq_burst_##name( \ Checking patch drivers/event/cnxk/cn9k_eventdev.c... error: while searching for: [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)] #define CN9K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops) \ enq_op = enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] \ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] \ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] \ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] \ error: patch failed: drivers/event/cnxk/cn9k_eventdev.c:19 Hunk #2 succeeded at 432 (offset -83 lines). Checking patch drivers/event/cnxk/cn9k_worker.h... error: drivers/event/cnxk/cn9k_worker.h: does not match index Checking patch drivers/event/cnxk/cn9k_worker_dual_tx_enq.c... Checking patch drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c... Checking patch drivers/event/cnxk/cn9k_worker_tx_enq.c... Checking patch drivers/event/cnxk/cn9k_worker_tx_enq_seg.c... Checking patch drivers/net/cnxk/cn9k_tx.c... Checking patch drivers/net/cnxk/cn9k_tx.h... Checking patch drivers/net/cnxk/cn9k_tx_mseg.c... Checking patch drivers/net/cnxk/cn9k_tx_vec.c... Checking patch drivers/net/cnxk/cn9k_tx_vec_mseg.c... Applying patch drivers/event/cnxk/cn9k_eventdev.c with 1 reject... Rejected hunk #1. Hunk #2 applied cleanly. Applied patch drivers/event/cnxk/cn9k_worker_dual_tx_enq.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_tx_enq.c cleanly. Applied patch drivers/event/cnxk/cn9k_worker_tx_enq_seg.c cleanly. Applied patch drivers/net/cnxk/cn9k_tx.c cleanly. Applied patch drivers/net/cnxk/cn9k_tx.h cleanly. Applied patch drivers/net/cnxk/cn9k_tx_mseg.c cleanly. Applied patch drivers/net/cnxk/cn9k_tx_vec.c cleanly. Applied patch drivers/net/cnxk/cn9k_tx_vec_mseg.c cleanly. diff a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c (rejected hunks) @@ -19,7 +19,8 @@ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)] #define CN9K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops) \ - enq_op = enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] \ + enq_op = enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_SECURITY_F)] \ + [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)] \ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)] \ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)] \ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)] \ Checking patch drivers/event/cnxk/cn10k_eventdev.c... error: while searching for: #include "cnxk_worker.h" #define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \ deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \ error: patch failed: drivers/event/cnxk/cn10k_eventdev.c:7 error: while searching for: cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) { struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); const event_dequeue_t sso_hws_deq[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_ca_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_seg_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t sso_hws_deq_ca_seg_burst[2][2][2][2][2][2] = { #define R(name, f5, f4, f3, f2, f1, f0, flags) \ [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; error: patch failed: drivers/event/cnxk/cn10k_eventdev.c:287 Hunk #3 succeeded at 339 (offset -49 lines). Checking patch drivers/event/cnxk/cn10k_worker.h... Hunk #1 succeeded at 105 (offset -1 lines). Hunk #2 succeeded at 125 (offset -1 lines). Hunk #3 succeeded at 173 (offset -1 lines). error: while searching for: RTE_EVENT_TYPE_ETHDEV) { uint8_t port = CNXK_SUB_EVENT_FROM_TAG(gw.u64[0]); gw.u64[0] = CNXK_CLR_SUB_EVENT(gw.u64[0]); cn10k_wqe_to_mbuf(gw.u64[1], mbuf, port, gw.u64[0] & 0xFFFFF, flags, error: patch failed: drivers/event/cnxk/cn10k_worker.h:188 Hunk #5 succeeded at 242 (offset -33 lines). error: while searching for: uint16_t __rte_hot cn10k_sso_hws_ca_enq(void *port, struct rte_event ev[], uint16_t nb_events); #define R(name, f5, f4, f3, f2, f1, f0, flags) \ uint16_t __rte_hot cn10k_sso_hws_deq_##name( \ void *port, struct rte_event *ev, uint64_t timeout_ticks); \ uint16_t __rte_hot cn10k_sso_hws_deq_burst_##name( \ error: patch failed: drivers/event/cnxk/cn10k_worker.h:290 Checking patch drivers/event/cnxk/cn10k_worker_deq.c... Checking patch drivers/event/cnxk/cn10k_worker_deq_burst.c... Checking patch drivers/event/cnxk/cn10k_worker_deq_ca.c... error: drivers/event/cnxk/cn10k_worker_deq_ca.c: does not exist in index Checking patch drivers/event/cnxk/cn10k_worker_deq_tmo.c... Checking patch drivers/net/cnxk/cn10k_ethdev.h... Checking patch drivers/net/cnxk/cn10k_rx.c... Checking patch drivers/net/cnxk/cn10k_rx.h... Hunk #1 succeeded at 64 (offset -1 lines). Hunk #2 succeeded at 300 (offset -1 lines). Hunk #3 succeeded at 317 (offset -1 lines). Hunk #4 succeeded at 408 (offset -1 lines). Hunk #5 succeeded at 438 (offset -1 lines). Hunk #6 succeeded at 457 (offset -1 lines). Hunk #7 succeeded at 479 (offset -1 lines). Hunk #8 succeeded at 515 (offset -1 lines). Hunk #9 succeeded at 535 (offset -1 lines). Hunk #10 succeeded at 559 (offset -1 lines). Hunk #11 succeeded at 653 (offset -1 lines). Hunk #12 succeeded at 707 (offset -1 lines). Hunk #13 succeeded at 916 (offset -1 lines). Hunk #14 succeeded at 958 (offset -1 lines). Hunk #15 succeeded at 983 (offset -1 lines). Checking patch drivers/net/cnxk/cn10k_rx_mseg.c... Checking patch drivers/net/cnxk/cn10k_rx_vec.c... Checking patch drivers/net/cnxk/cn10k_rx_vec_mseg.c... Checking patch drivers/net/cnxk/cn10k_tx.h... Applying patch drivers/event/cnxk/cn10k_eventdev.c with 2 rejects... Rejected hunk #1. Rejected hunk #2. Hunk #3 applied cleanly. Applying patch drivers/event/cnxk/cn10k_worker.h with 2 rejects... Hunk #1 applied cleanly. Hunk #2 applied cleanly. Hunk #3 applied cleanly. Rejected hunk #4. Hunk #5 applied cleanly. Rejected hunk #6. Applied patch drivers/event/cnxk/cn10k_worker_deq.c cleanly. Applied patch drivers/event/cnxk/cn10k_worker_deq_burst.c cleanly. Applied patch drivers/event/cnxk/cn10k_worker_deq_tmo.c cleanly. Applied patch drivers/net/cnxk/cn10k_ethdev.h cleanly. Applied patch drivers/net/cnxk/cn10k_rx.c cleanly. Applied patch drivers/net/cnxk/cn10k_rx.h cleanly. Applied patch drivers/net/cnxk/cn10k_rx_mseg.c cleanly. Applied patch drivers/net/cnxk/cn10k_rx_vec.c cleanly. Applied patch drivers/net/cnxk/cn10k_rx_vec_mseg.c cleanly. Applied patch drivers/net/cnxk/cn10k_tx.h cleanly. diff a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c (rejected hunks) @@ -7,7 +7,8 @@ #include "cnxk_worker.h" #define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \ - deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ + deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)] \ + [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \ @@ -287,88 +288,91 @@ static void cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) { struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); - const event_dequeue_t sso_hws_deq[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_##name, + const event_dequeue_t sso_hws_deq[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_burst_##name, + const event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name, + const event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name, + const event_dequeue_burst_t + sso_hws_deq_tmo_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_##name, + const event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_ca_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_burst_##name, + const event_dequeue_burst_t + sso_hws_deq_ca_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_##name, + const event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_burst_t sso_hws_deq_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_burst_##name, + const event_dequeue_burst_t + sso_hws_deq_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name, + const event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name, + sso_hws_deq_tmo_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; - const event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_##name, + const event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_##name, NIX_RX_FASTPATH_MODES #undef R }; const event_dequeue_burst_t - sso_hws_deq_ca_seg_burst[2][2][2][2][2][2] = { -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ - [f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_burst_##name, + sso_hws_deq_ca_seg_burst[2][2][2][2][2][2][2] = { +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ + [f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_burst_##name, NIX_RX_FASTPATH_MODES #undef R }; diff a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h (rejected hunks) @@ -188,6 +223,34 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev, RTE_EVENT_TYPE_ETHDEV) { uint8_t port = CNXK_SUB_EVENT_FROM_TAG(gw.u64[0]); + if (flags & NIX_RX_OFFLOAD_SECURITY_F) { + struct rte_mbuf *m; + uintptr_t sa_base; + uint64_t iova = 0; + uint8_t loff = 0; + uint16_t d_off; + uint64_t cq_w1; + + m = (struct rte_mbuf *)mbuf; + d_off = (uintptr_t)(m->buf_addr) - (uintptr_t)m; + d_off += RTE_PKTMBUF_HEADROOM; + + cq_w1 = *(uint64_t *)(gw.u64[1] + 8); + + sa_base = cnxk_nix_sa_base_get(port, + lookup_mem); + sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1); + + mbuf = (uint64_t)nix_sec_meta_to_mbuf_sc(cq_w1, + sa_base, (uintptr_t)&iova, + &loff, (struct rte_mbuf *)mbuf, + d_off); + if (loff) + roc_npa_aura_op_free(m->pool->pool_id, + 0, iova); + + } + gw.u64[0] = CNXK_CLR_SUB_EVENT(gw.u64[0]); cn10k_wqe_to_mbuf(gw.u64[1], mbuf, port, gw.u64[0] & 0xFFFFF, flags, @@ -290,7 +353,7 @@ uint16_t __rte_hot cn10k_sso_hws_enq_fwd_burst(void *port, uint16_t __rte_hot cn10k_sso_hws_ca_enq(void *port, struct rte_event ev[], uint16_t nb_events); -#define R(name, f5, f4, f3, f2, f1, f0, flags) \ +#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \ uint16_t __rte_hot cn10k_sso_hws_deq_##name( \ void *port, struct rte_event *ev, uint64_t timeout_ticks); \ uint16_t __rte_hot cn10k_sso_hws_deq_burst_##name( \ Checking patch doc/guides/rel_notes/release_21_11.rst... error: while searching for: * Added event crypto adapter OP_FORWARD mode support. Removed Items ------------- error: patch failed: doc/guides/rel_notes/release_21_11.rst:65 Checking patch drivers/event/cnxk/cn10k_eventdev.c... error: drivers/event/cnxk/cn10k_eventdev.c: does not match index Checking patch drivers/event/cnxk/cn10k_worker.h... error: drivers/event/cnxk/cn10k_worker.h: does not match index Checking patch drivers/event/cnxk/cn10k_worker_tx_enq.c... Checking patch drivers/event/cnxk/cn10k_worker_tx_enq_seg.c... Checking patch drivers/net/cnxk/cn10k_tx.c... Checking patch drivers/net/cnxk/cn10k_tx.h... error: drivers/net/cnxk/cn10k_tx.h: does not match index Checking patch drivers/net/cnxk/cn10k_tx_mseg.c... Checking patch drivers/net/cnxk/cn10k_tx_vec.c... Checking patch drivers/net/cnxk/cn10k_tx_vec_mseg.c... Applying patch doc/guides/rel_notes/release_21_11.rst with 1 reject... Rejected hunk #1. Applied patch drivers/event/cnxk/cn10k_worker_tx_enq.c cleanly. Applied patch drivers/event/cnxk/cn10k_worker_tx_enq_seg.c cleanly. Applied patch drivers/net/cnxk/cn10k_tx.c cleanly. Applied patch drivers/net/cnxk/cn10k_tx_mseg.c cleanly. Applied patch drivers/net/cnxk/cn10k_tx_vec.c cleanly. Applied patch drivers/net/cnxk/cn10k_tx_vec_mseg.c cleanly. diff a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst (rejected hunks) @@ -65,6 +65,11 @@ New Features * Added event crypto adapter OP_FORWARD mode support. +* **Added support for Inline IPsec on Marvell CN10K and CN9K.** + + * Added support for Inline IPsec in net/cnxk PMD for CN9K event mode + and CN10K poll mode and event mode. + Removed Items ------------- Checking patch drivers/net/cnxk/cn9k_ethdev.h... Checking patch drivers/net/cnxk/cn9k_ethdev_sec.c... Checking patch drivers/net/cnxk/cn9k_rx.h... error: drivers/net/cnxk/cn9k_rx.h: does not match index Applied patch drivers/net/cnxk/cn9k_ethdev.h cleanly. Applied patch drivers/net/cnxk/cn9k_ethdev_sec.c cleanly. Checking patch drivers/common/cnxk/cnxk_security.c... Hunk #1 succeeded at 299 (offset 60 lines). Checking patch drivers/net/cnxk/cn10k_ethdev.h... error: drivers/net/cnxk/cn10k_ethdev.h: does not match index Checking patch drivers/net/cnxk/cn10k_ethdev_sec.c... Checking patch drivers/net/cnxk/cn10k_tx.h... error: drivers/net/cnxk/cn10k_tx.h: does not match index Applied patch drivers/common/cnxk/cnxk_security.c cleanly. Applied patch drivers/net/cnxk/cn10k_ethdev_sec.c cleanly. Checking patch drivers/net/cnxk/cn10k_ethdev_sec.c... error: drivers/net/cnxk/cn10k_ethdev_sec.c: does not match index Checking patch drivers/net/cnxk/cn9k_ethdev_sec.c... error: drivers/net/cnxk/cn9k_ethdev_sec.c: does not match index Checking patch drivers/net/cnxk/cn10k_tx.h... error: drivers/net/cnxk/cn10k_tx.h: does not match index Checking patch drivers/net/cnxk/cnxk_ethdev.c... Applied patch drivers/net/cnxk/cnxk_ethdev.c cleanly. https://lab.dpdk.org/results/dashboard/patchsets/18495/ UNH-IOL DPDK Community Lab