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Subject: |WARNING| pw110743 [PATCH 03/11] eal: add initial support for RISC-V
 architecture
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From: checkpatch@dpdk.org
Cc: Stanislaw Kardach <kda@semihalf.com>
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Date: Thu,  5 May 2022 19:31:42 +0200 (CEST)
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Test-Label: checkpatch
Test-Status: WARNING
http://dpdk.org/patch/110743

_coding style issues_


WARNING:BAD_SIGN_OFF: Non-standard signature: Sponsored-by:
#130: 
Sponsored-by: Frank Zhao <Frank.Zhao@starfivetech.com>

WARNING:BAD_SIGN_OFF: Non-standard signature: Sponsored-by:
#131: 
Sponsored-by: Sam Grove <sam.grove@sifive.com>

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#818: FILE: lib/eal/riscv/include/rte_atomic.h:24:
+#define rte_mb()	asm volatile("fence rw, rw" : : : "memory")

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#820: FILE: lib/eal/riscv/include/rte_atomic.h:26:
+#define rte_wmb()	asm volatile("fence w, w" : : : "memory")

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#822: FILE: lib/eal/riscv/include/rte_atomic.h:28:
+#define rte_rmb()	asm volatile("fence r, r" : : : "memory")

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#830: FILE: lib/eal/riscv/include/rte_atomic.h:36:
+#define rte_io_mb()	asm volatile("fence iorw, iorw" : : : "memory")

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#832: FILE: lib/eal/riscv/include/rte_atomic.h:38:
+#define rte_io_wmb()	asm volatile("fence orw, ow" : : : "memory")

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#834: FILE: lib/eal/riscv/include/rte_atomic.h:40:
+#define rte_io_rmb()	asm volatile("fence ir, ir" : : : "memory")

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#984: FILE: lib/eal/riscv/include/rte_cycles.h:21:
+#define RV64_CSRR(reg, value) \
+	asm volatile("csrr %0, " #reg : "=r" (value) : : "memory")

WARNING:TYPO_SPELLING: 'hart' may be misspelled - perhaps 'heart'?
#1006: FILE: lib/eal/riscv/include/rte_cycles.h:43:
+/** Read hart cycle counter */

WARNING:TYPO_SPELLING: 'hart' may be misspelled - perhaps 'heart'?
#1015: FILE: lib/eal/riscv/include/rte_cycles.h:52:
+/** Read hart cycle counter ensuring no re-ordering */

total: 7 errors, 4 warnings, 1444 lines checked
Warning in lib/eal/riscv/include/rte_vect.h:
Using compiler attribute directly
Warning in lib/eal/riscv/include/rte_atomic.h:
Using rte_smp_[r/w]mb
Warning in lib/eal/riscv/include/rte_atomic.h:
Using __atomic_thread_fence