From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 97AC343C21 for ; Wed, 28 Feb 2024 11:27:56 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9283B402AE; Wed, 28 Feb 2024 11:27:56 +0100 (CET) Received: from dpdk.org (dpdk.org [92.243.24.197]) by mails.dpdk.org (Postfix) with ESMTP id 2742C40295 for ; Wed, 28 Feb 2024 11:27:55 +0100 (CET) Received: by dpdk.org (Postfix, from userid 65534) id 16D86122320; Wed, 28 Feb 2024 11:27:54 +0100 (CET) Subject: |WARNING| pw137424 [PATCH v2 4/4] net/mlx5: add support for flow table resizing In-Reply-To: <20240228102526.434717-5-getelson@nvidia.com> References: <20240228102526.434717-5-getelson@nvidia.com> To: test-report@dpdk.org From: checkpatch@dpdk.org Cc: Gregory Etelson Message-Id: <20240228102755.16D86122320@dpdk.org> Date: Wed, 28 Feb 2024 11:27:54 +0100 (CET) X-BeenThere: test-report@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: automatic DPDK test reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: test-report-bounces@dpdk.org Test-Label: checkpatch Test-Status: WARNING http://dpdk.org/patch/137424 _coding style issues_ WARNING:LONG_LINE: line length of 107 exceeds 100 columns #729: FILE: drivers/net/mlx5/mlx5_flow_hw.c:4459: + matcher_attr.resizable = !!rte_flow_template_table_resizable(dev->data->port_id, &table_cfg->attr); WARNING:LONG_LINE: line length of 103 exceeds 100 columns #768: FILE: drivers/net/mlx5/mlx5_flow_hw.c:4706: + if (!cfg.attr.flow_attr.group && rte_flow_template_table_resizable(dev->data->port_id, attr)) { ERROR:TRAILING_STATEMENTS: trailing statements should be on next line #897: FILE: drivers/net/mlx5/mlx5_flow_hw.c:12215: + for (i = 1; [...] + i++, segment++); total: 1 errors, 2 warnings, 0 checks, 924 lines checked Warning in drivers/net/mlx5/mlx5_flow_hw.c: Using __atomic_xxx/__ATOMIC_XXX built-ins, prefer rte_atomic_xxx/rte_memory_order_xxx