|WARNING| pw151092-151127 [PATCH v3 01/36] net/e1000/base: copy i225 code into e1000

|WARNING| pw151092-151127 [PATCH v3 01/36] net/e1000/base: copy i225 code into e1000

[qemudev]

Test-Label: loongarch-compilation
Test-Status: WARNING
http://dpdk.org/patch/151092

_apply patch failure_

Submitter: Anatoly Burakov <anatoly.burakov@intel.com>
Date: Fri,  7 Feb 2025 12:44:53 +0000
DPDK git baseline: Repo:dpdk-next-net
  Branch: main
  CommitID: e5ece9ae686535f29ae72c03fec26dc16ff7a925

Apply patch set 151092-151127 failed:

Checking patch drivers/net/intel/e1000/base/e1000_api.c...
Checking patch drivers/net/intel/e1000/base/e1000_api.h...
Checking patch drivers/net/intel/e1000/base/e1000_defines.h...
Hunk #5 succeeded at 603 (offset -1 lines).
Hunk #6 succeeded at 637 (offset -1 lines).
Hunk #7 succeeded at 790 (offset -1 lines).
Hunk #8 succeeded at 913 (offset -1 lines).
Hunk #9 succeeded at 944 (offset -1 lines).
Hunk #10 succeeded at 1086 (offset -1 lines).
Hunk #11 succeeded at 1138 (offset -1 lines).
Hunk #12 succeeded at 1365 (offset -1 lines).
Hunk #13 succeeded at 1489 (offset -1 lines).
Hunk #14 succeeded at 1501 (offset -1 lines).
Hunk #15 succeeded at 1585 (offset -1 lines).
Hunk #16 succeeded at 1645 (offset -1 lines).
Checking patch drivers/net/intel/e1000/base/e1000_hw.h...
Checking patch drivers/net/intel/igc/base/igc_i225.c => drivers/net/intel/e1000/base/e1000_i225.c...
error: while searching for:
	}

	/* Clear any pending interrupt events. */
	IGC_WRITE_REG(hw, IGC_IMC, 0xffffffff);
	IGC_READ_REG(hw, IGC_ICR);

	/* Install any alternate MAC address into RAR0 */
	ret_val = igc_check_alt_mac_addr_generic(hw);

	return ret_val;
}

/* igc_acquire_nvm_i225 - Request for access to EEPROM
 * @hw: pointer to the HW structure
 *
 * Acquire the necessary semaphores for exclusive access to the EEPROM.
 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
 * Return successful if access grant bit set, else clear the request for
 * EEPROM access and return -IGC_ERR_NVM (-1).
 */
static s32 igc_acquire_nvm_i225(struct igc_hw *hw)
{
	s32 ret_val;

	DEBUGFUNC("igc_acquire_nvm_i225");

	ret_val = igc_acquire_swfw_sync_i225(hw, IGC_SWFW_EEP_SM);

	return ret_val;
}

/* igc_release_nvm_i225 - Release exclusive access to EEPROM
 * @hw: pointer to the HW structure
 *
 * Stop any current commands to the EEPROM and clear the EEPROM request bit,
 * then release the semaphores acquired.
 */
static void igc_release_nvm_i225(struct igc_hw *hw)
{
	DEBUGFUNC("igc_release_nvm_i225");

	igc_release_swfw_sync_i225(hw, IGC_SWFW_EEP_SM);
}

/* igc_acquire_swfw_sync_i225 - Acquire SW/FW semaphore
 * @hw: pointer to the HW structure
 * @mask: specifies which semaphore to acquire
 *
 * Acquire the SW/FW semaphore to access the PHY or NVM.  The mask
 * will also specify which port we're acquiring the lock for.
 */
s32 igc_acquire_swfw_sync_i225(struct igc_hw *hw, u16 mask)
{
	u32 swfw_sync;
	u32 swmask = mask;
	u32 fwmask = mask << 16;
	s32 ret_val = IGC_SUCCESS;
	s32 i = 0, timeout = 200; /* FIXME: find real value to use here */

	DEBUGFUNC("igc_acquire_swfw_sync_i225");

	while (i < timeout) {
		if (igc_get_hw_semaphore_i225(hw)) {
			ret_val = -IGC_ERR_SWFW_SYNC;
			goto out;
		}

		swfw_sync = IGC_READ_REG(hw, IGC_SW_FW_SYNC);
		if (!(swfw_sync & (fwmask | swmask)))
			break;

		/* Firmware currently using resource (fwmask)
		 * or other software thread using resource (swmask)
		 */
		igc_put_hw_semaphore_generic(hw);
		msec_delay_irq(5);
		i++;
	}

	if (i == timeout) {
		DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
		ret_val = -IGC_ERR_SWFW_SYNC;
		goto out;
	}

	swfw_sync |= swmask;
	IGC_WRITE_REG(hw, IGC_SW_FW_SYNC, swfw_sync);

	igc_put_hw_semaphore_generic(hw);

out:
	return ret_val;
}

/* igc_release_swfw_sync_i225 - Release SW/FW semaphore
 * @hw: pointer to the HW structure
 * @mask: specifies which semaphore to acquire
 *
 * Release the SW/FW semaphore used to access the PHY or NVM.  The mask
 * will also specify which port we're releasing the lock for.
 */
void igc_release_swfw_sync_i225(struct igc_hw *hw, u16 mask)
{
	u32 swfw_sync;

	DEBUGFUNC("igc_release_swfw_sync_i225");

	/* Releasing the resource requires first getting the HW semaphore.
	 * If we fail to get the semaphore, there is nothing we can do,
	 * except log an error and quit. We are not allowed to hang here
	 * indefinitely, as it may cause denial of service or system crash.
	 */
	if (igc_get_hw_semaphore_i225(hw) != IGC_SUCCESS) {
		DEBUGOUT("Failed to release SW_FW_SYNC.\n");
		return;
	}

	swfw_sync = IGC_READ_REG(hw, IGC_SW_FW_SYNC);
	swfw_sync &= ~(u32)mask;
	IGC_WRITE_REG(hw, IGC_SW_FW_SYNC, swfw_sync);

	igc_put_hw_semaphore_generic(hw);
}

/*
 * igc_setup_copper_link_i225 - Configure copper link settings
 * @hw: pointer to the HW structure
 *
 * Configures the link for auto-neg or forced speed and duplex.  Then we check
 * for link, once link is established calls to configure collision distance
 * and flow control are called.
 */
s32 igc_setup_copper_link_i225(struct igc_hw *hw)
{
	u32 phpm_reg;
	s32 ret_val;
	u32 ctrl;

	DEBUGFUNC("igc_setup_copper_link_i225");

	ctrl = IGC_READ_REG(hw, IGC_CTRL);
	ctrl |= IGC_CTRL_SLU;
	ctrl &= ~(IGC_CTRL_FRCSPD | IGC_CTRL_FRCDPX);
	IGC_WRITE_REG(hw, IGC_CTRL, ctrl);

	phpm_reg = IGC_READ_REG(hw, IGC_I225_PHPM);
	phpm_reg &= ~IGC_I225_PHPM_GO_LINKD;
	IGC_WRITE_REG(hw, IGC_I225_PHPM, phpm_reg);

	ret_val = igc_setup_copper_link_generic(hw);

	return ret_val;
}


error: patch failed: drivers/net/intel/igc/base/igc_i225.c:229
error: drivers/net/intel/igc/base/igc_i225.c: patch does not apply
Checking patch drivers/net/intel/e1000/base/e1000_i225.h...
Checking patch drivers/net/intel/e1000/base/e1000_mac.c...
Hunk #1 succeeded at 987 (offset -2 lines).
Hunk #2 succeeded at 1641 (offset -2 lines).
Checking patch drivers/net/intel/e1000/base/e1000_nvm.c...
Checking patch drivers/net/intel/e1000/base/e1000_osdep.h...
Checking patch drivers/net/intel/e1000/base/e1000_phy.c...
Hunk #7 succeeded at 2480 (offset -1 lines).
Hunk #8 succeeded at 2508 (offset -1 lines).
Hunk #9 succeeded at 3089 (offset -1 lines).
Hunk #10 succeeded at 3551 (offset -1 lines).
Hunk #11 succeeded at 3960 (offset -1 lines).
Hunk #12 succeeded at 4153 (offset -1 lines).
Checking patch drivers/net/intel/e1000/base/e1000_phy.h...
Checking patch drivers/net/intel/e1000/base/e1000_regs.h...
Checking patch drivers/net/intel/e1000/base/meson.build...

|WARNING| pw151092 [PATCH v3 01/36] net/e1000/base: copy i225 code into e1000

[checkpatch]

Test-Label: checkpatch
Test-Status: WARNING
http://dpdk.org/patch/151092

_coding style issues_


CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#136: FILE: drivers/net/intel/e1000/base/e1000_api.h:22:
+extern void e1000_init_function_pointers_i225(struct e1000_hw *hw);

WARNING:TYPO_SPELLING: 'Aserted' may be misspelled - perhaps 'Asserted'?
#207: FILE: drivers/net/intel/e1000/base/e1000_defines.h:641:
+#define E1000_ICS_DRSTA		E1000_ICR_DRSTA     /* Device Reset Aserted */

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#380: FILE: drivers/net/intel/e1000/base/e1000_defines.h:1595:
+#define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
+	(u8)((invm_dword) & 0x7)

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#382: FILE: drivers/net/intel/e1000/base/e1000_defines.h:1597:
+#define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
+	(u8)(((invm_dword) & 0x0000FE00) >> 9)

ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#384: FILE: drivers/net/intel/e1000/base/e1000_defines.h:1599:
+#define INVM_DWORD_TO_WORD_DATA(invm_dword) \
+	(u16)(((invm_dword) & 0xFFFF0000) >> 16)

WARNING:TYPO_SPELLING: 'master' may be misspelled - perhaps 'primary'?
#819: FILE: drivers/net/intel/e1000/base/e1000_i225.c:203:
+	ret_val = e1000_disable_pcie_master_generic(hw);

total: 3 errors, 2 warnings, 1 checks, 2612 lines checked