From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 38EB8A0503 for ; Fri, 20 May 2022 17:48:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0597940222; Fri, 20 May 2022 17:48:49 +0200 (CEST) Received: from mail-pg1-f171.google.com (mail-pg1-f171.google.com [209.85.215.171]) by mails.dpdk.org (Postfix) with ESMTP id 6CCDA40156 for ; Fri, 20 May 2022 17:48:47 +0200 (CEST) Received: by mail-pg1-f171.google.com with SMTP id x12so8047896pgj.7 for ; Fri, 20 May 2022 08:48:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20210112.gappssmtp.com; s=20210112; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lmHTug6P1aSi3RIByx91OMkVNsowWCkiqHFf+koFlIY=; b=5u1bDg7+LHdX2p7PuiJS29w/hlLprf7jiMJtz7TYWtk7W7cWO9Ua1OC189OO5pGri8 S7j2Pk3Q9b5Rs1czIdWS4v07feuCaA6uDmJSXUNNpidT7kTyJEy73/JoKB47u/M/GMmb Yh+Q4Yu+aG0rtl5y64h7Zbwv0VJ6xRPobDd/NfRqKuxLm0DT60dg6vk8rGrYbFzMNnl1 pwQLWoG2V7vZzF3RFtZ4TOd+NAp7DE1kebiegauUM5IMWmj1pqtwZkHvpiqB4wCwSPFO XeVayrNuyzIbNoFMR1aWhDfZrvQOXCV64B03DDqtcaWlxf1l6WU3H5lJ7WSItFMCC4JS STNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lmHTug6P1aSi3RIByx91OMkVNsowWCkiqHFf+koFlIY=; b=Gyct6J8kGJhfW0CfJeSJAbqFAvVQSLw9wzaBErTQ19YFmvwz2RcwcOE640+MJI7mjX JZ2/2ixhoqF2f9bb9ndCgA/fCtHgydMmC+Vu7+iHHv13YZqWD+LAtGMW7VjJiaRpxy2y J/miWih9c/GJx/LiAAcrPeg6MbehO/lIIJ1mHHliKo/Vk4lqpXx9G5OaiL55cbgnraoT ETLZQYTxkAser0R9+mHnrsyARbnZ+7bssHKIcnZZxPmJhEnxqZiv9ev9x+9IFMe62RHW ObFnfhczYjPQgW4aJTiOuQC7QNmLe+jClDpjaAFd3f9iroEukbebxwxRU3n9URqN6Yva ECDw== X-Gm-Message-State: AOAM532fc4w+f5z0wXqFM0cEWu714BNwzWKaLLyySWdu0+JfYLnjSitM 5mrj7LJJfvTyL2W5XQIN2nbgrg== X-Google-Smtp-Source: ABdhPJzE3JZFfhIBQqFuWuUIPTp/QwxHu/trexSV/TVfes6jZzdCcAmBo0VR3USOfIoP24oG8nd2zQ== X-Received: by 2002:a62:7ccc:0:b0:510:4e07:79f3 with SMTP id x195-20020a627ccc000000b005104e0779f3mr10769721pfc.10.1653061726438; Fri, 20 May 2022 08:48:46 -0700 (PDT) Received: from hermes.local (204-195-112-199.wavecable.com. [204.195.112.199]) by smtp.gmail.com with ESMTPSA id i7-20020a17090a2a0700b001df7c160875sm2022674pjd.25.2022.05.20.08.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 May 2022 08:48:45 -0700 (PDT) Date: Fri, 20 May 2022 08:48:43 -0700 From: Stephen Hemminger To: Antonio Di Bacco Cc: users@dpdk.org Subject: Re: Optimizing memory access with DPDK allocated memory Message-ID: <20220520084843.698f04ee@hermes.local> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK usage discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: users-bounces@dpdk.org On Fri, 20 May 2022 10:34:46 +0200 Antonio Di Bacco wrote: > Let us say I have two memory channels each one with its own 16GB memory > module, I suppose the first memory channel will be used when addressing > physical memory in the range 0 to 0x4 0000 0000 and the second when > addressing physical memory in the range 0x4 0000 0000 to 0x7 ffff ffff. > Correct? > Now, I need to have a 2GB buffer with one "writer" and one "reader", the > writer writes on half of the buffer (call it A) and, in the meantime, the > reader reads on the other half (B). When the writer finishes writing its > half buffer (A), signal it to the reader and they swap, the reader starts > to read from A and writer starts to write to B. > If I allocate the whole buffer (on two 1GB hugepages) across the two memory > channels, one half of the buffer is allocated on the end of first channel > while the other half is allocated on the start of the second memory > channel, would this increase performances compared to the whole buffer > allocated within the same memory channel? Most systems just interleave memory chips based on number of filled slots. This is handled by BIOS before kernel even starts. The DPDK has a number of memory channels parameter and what it does is try and optimize memory allocation by spreading. Looks like you are inventing your own limited version of what memif does.