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[204.195.112.199]) by smtp.gmail.com with ESMTPSA id i7-20020a17090a2a0700b001df7c160875sm2022674pjd.25.2022.05.20.08.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 May 2022 08:48:45 -0700 (PDT) Date: Fri, 20 May 2022 08:48:43 -0700 From: Stephen Hemminger <stephen@networkplumber.org> To: Antonio Di Bacco <a.dibacco.ks@gmail.com> Cc: users@dpdk.org Subject: Re: Optimizing memory access with DPDK allocated memory Message-ID: <20220520084843.698f04ee@hermes.local> In-Reply-To: <CAO8pfFkGq3pt44AH7mFDrez_7Kr7d+T8y3W7TNoTT0stbr+y_g@mail.gmail.com> References: <CAO8pfFkGq3pt44AH7mFDrez_7Kr7d+T8y3W7TNoTT0stbr+y_g@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK usage discussions <users.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/users>, <mailto:users-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/users/> List-Post: <mailto:users@dpdk.org> List-Help: <mailto:users-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/users>, <mailto:users-request@dpdk.org?subject=subscribe> Errors-To: users-bounces@dpdk.org On Fri, 20 May 2022 10:34:46 +0200 Antonio Di Bacco <a.dibacco.ks@gmail.com> wrote: > Let us say I have two memory channels each one with its own 16GB memory > module, I suppose the first memory channel will be used when addressing > physical memory in the range 0 to 0x4 0000 0000 and the second when > addressing physical memory in the range 0x4 0000 0000 to 0x7 ffff ffff. > Correct? > Now, I need to have a 2GB buffer with one "writer" and one "reader", the > writer writes on half of the buffer (call it A) and, in the meantime, the > reader reads on the other half (B). When the writer finishes writing its > half buffer (A), signal it to the reader and they swap, the reader starts > to read from A and writer starts to write to B. > If I allocate the whole buffer (on two 1GB hugepages) across the two memory > channels, one half of the buffer is allocated on the end of first channel > while the other half is allocated on the start of the second memory > channel, would this increase performances compared to the whole buffer > allocated within the same memory channel? Most systems just interleave memory chips based on number of filled slots. This is handled by BIOS before kernel even starts. The DPDK has a number of memory channels parameter and what it does is try and optimize memory allocation by spreading. Looks like you are inventing your own limited version of what memif does.