From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-f171.google.com (mail-yb1-f171.google.com [209.85.219.171]) by dpdk.org (Postfix) with ESMTP id ACEB51B53B for ; Tue, 9 Oct 2018 22:45:59 +0200 (CEST) Received: by mail-yb1-f171.google.com with SMTP id o63-v6so1274881yba.2 for ; Tue, 09 Oct 2018 13:45:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=MrIjm9TA7wI1NYc/Xqui5xTmjVfJsNlM3OXVyuXsBA0=; b=BD6fzR37nyGgIElXcXayGuBOiBooJBPe3YSoP2+OizRUFr6mYQbj+v0G/uSRF9NKiz Sf+Nfmh0sz7lOoEJe0JKYR3w8pbNr3YXO3DE4b/aXr0vv9MUX7GNOtlG9JrEAEaisz1c nwNv2rgUBr3m9mfigjhqXHukCq3p6S5bARiv9mnAuqPfxPfoTNSqiTB86pZbR9bLhfQP eioMVo5H1LN/NlbB1TbgaLNwGX1T2/G4DlRfjMlFq66hy8UWNJyf+XdukT21xWSw1M52 3zA4vt0tRsLW+hacGTxnVi0XspaZcMuXM0/8rTL+0i407rWTbt+GSZ6W4+CR+wyslT6z IZhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=MrIjm9TA7wI1NYc/Xqui5xTmjVfJsNlM3OXVyuXsBA0=; b=j7J8Lp+NFHu0/q4yxLqY4gYIwcLFABIC7XDL+bMlEjvKJFkPAyES5GS1gOvDosxuLV LifiO2iim1l8CCvnIPt+nlt4a2tbYysUH10TYjdZTTTQvFz2pmIKUFl4rzhAc5fMjkbT lZgrEqxiRvXb/Y0UsmFDoIFbQVrSMuRklxoNuz+LFSPRMaavvtugH8YJ50XdwHSDRRiY 11a1yYIYRTmKHypyy32EJg3HklWz2U+pEv37ilB1FWp/v+cxemxezx1u47UTGU9RPxCF thUsuGiENTOjUFxASFedmvodb3n6tyBrXT9NUQa3bCEw/Sz8axlJys9Vr+aXuZx/Ahpv IVFA== X-Gm-Message-State: ABuFfog1XoWaMBmHUjkvaU2akeRuIBQfGFxj3Zbiczd95k/NK9TuUUzr 3q4kQj/UDZMLnwo7lr9+rOX+92Ua2D0rScwwOuY= X-Google-Smtp-Source: ACcGV63VG376VZfYzqK/uljeg4mXv3VYHXuwBliKzQDNL8G0dgfgFm7jYnMsV+FCJFHIMDvDb+isTNtOvXT3Z9jJtag= X-Received: by 2002:a25:18c5:: with SMTP id 188-v6mr16352684yby.168.1539117958836; Tue, 09 Oct 2018 13:45:58 -0700 (PDT) MIME-Version: 1.0 References: <2099488D-C9CD-4989-AF1F-18EA9F558717@intel.com> <38D6EF20-F968-44BD-9341-2DA5ECA62764@intel.com> In-Reply-To: <38D6EF20-F968-44BD-9341-2DA5ECA62764@intel.com> From: Cliff Burdick Date: Tue, 9 Oct 2018 13:45:47 -0700 Message-ID: To: keith.wiles@intel.com Cc: users , bruce.richardson@intel.com, konstantin.ananyev@intel.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-users] RTE_MACHINE_TYPE Error X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK usage discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Oct 2018 20:46:00 -0000 It was my mistake. It's a server haswell processor, but the BIOS had AES-NI disabled. I enabled it, recompiled with CONFIG_RTE_MACHINE=3D"haswell", and it works great now. Thanks! On Tue, Oct 9, 2018 at 1:00 PM Wiles, Keith wrote: > > > > On Oct 9, 2018, at 9:56 AM, Cliff Burdick wrote: > > > > I think I answered my own question -- the motherboards we're using had > AES-NI disabled in the BIOS, so DPDK was correctly not seeing it enabled > even though the processor supports it. I enabled it in the BIOS and it's > working properly now. Thanks again Keith! > > Ok great. > > > > > On Tue, Oct 9, 2018 at 7:37 AM Cliff Burdick wrote= : > > Thanks Keith. You are right that /proc/cpuinfo on a E5-2680 v3 does not > have AES listed. I was incorrect assuming this was a broadwell system, bu= t > it's Haswell. Either way, I'm still not quite clear what's going on since > the gcc manual here (https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html) > specifies this: > > > > =E2=80=98haswell=E2=80=99 > > Intel Haswell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, > SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, > FMA, BMI, BMI2 and F16C instruction set support. > > > > Is the gcc manual specifying some other AES feature that's not what DPD= K > is listing? > > > > > > > > > > On Tue, Oct 9, 2018 at 6:54 AM Wiles, Keith > wrote: > > > > > > > On Oct 8, 2018, at 11:10 PM, Cliff Burdick wrote= : > > > > > > Hi, I'm trying to compile on a machine with an older-generation xeon > than > > > the target, so I'm using CONFIG_RTE_MACHINE=3D"broadwell" in the conf= ig. > > > gcc's options show that broadwell supports the AES flag, and I verifi= ed > > > that the build shows -march=3Dbroadwell. However, when I run my > application > > > it prints immediately: > > > > > > ERROR: This system does not support "AES". > > > Please check that RTE_MACHINE is set correctly. > > > EAL: FATAL: unsupported cpu type. > > > EAL: unsupported cpu type. > > > EAL: Error - exiting with code: 1 > > > Cause: Error with EAL initialization > > > > > > This is gcc 7, so it supports that flag. Does anyone know how I can > compile > > > for a later architecture on an older machine? > > > > Have you checked to make sure the CPU does support the feature by > looking that the CPU flags in /proc/cpuinfo ? > > > > Normally this is the reason the code will not run is the CPU does not > support it. > > > > Regards, > > Keith > > > > Regards, > Keith > >