Mr. Hemminger,

Thank you once again for your help.

Now, I did see the one-liner DPDK puts in code which you reference:

struct rte_eth_thresh {
        uint8_t pthresh; /**< Ring prefetch threshold. */
        uint8_t hthresh; /**< Ring host threshold. */
        uint8_t wthresh; /**< Ring writeback threshold. */
};

The problem for me is I don't know what "ring host threshold" or "ring writeback" means.

"Ring prefetch threshold" I think I understand. This refers to how mbufs are pending in the ring before it starts writing them onto the wire. This seems to have some connection to tx_rs_thresh. 

On Thu, Mar 17, 2022 at 12:48 PM Stephen Hemminger <stephen@networkplumber.org> wrote:
On Thu, 17 Mar 2022 12:05:33 -0400
fwefew 4t4tg <7532yahoo@gmail.com> wrote:

> DPDK provides but does not define (that I can see at least) these TXQ
> config fields. What are these fields what do they do?
>
> https://doc.dpdk.org/api/structrte__eth__thresh.html
> uint8_t pthresh
> uint8_t hthresh
> uint8_t wthresh

These are low level details inherited from original Intel NIC's (ie ixgbe)
they only apply to some NICs. They are used to control the ring threshold
values relating to PCI.

In rte_ethdev.h
/**
 * A structure used to configure the ring threshold registers of an Rx/Tx
 * queue for an Ethernet port.
 */
struct rte_eth_thresh {
        uint8_t pthresh; /**< Ring prefetch threshold. */
        uint8_t hthresh; /**< Ring host threshold. */
        uint8_t wthresh; /**< Ring writeback threshold. */
};


> And here: What is the RS bit?
> https://doc.dpdk.org/api/structrte__eth__txconf.html
> uint16_t tx_rs_thresh.

Ready to Send?

>
> And some what unrelated: What is a ``doorbell"? this is something I
> continue to run into esp. in Mellanox NIC papers? Doorbell counts are
> reported for AWS NICs at least with xstats api:
>
> tx_q0_doorbells: 18812
> tx_q1_doorbells: 18861

These are how many times driver needed to poke hardware to tell it
that new packets are ready to send.