From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C54AAA0093 for ; Thu, 17 Mar 2022 17:59:31 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 51B1540E28; Thu, 17 Mar 2022 17:59:31 +0100 (CET) Received: from mail-vk1-f178.google.com (mail-vk1-f178.google.com [209.85.221.178]) by mails.dpdk.org (Postfix) with ESMTP id 2F1ED407FF for ; Thu, 17 Mar 2022 17:59:30 +0100 (CET) Received: by mail-vk1-f178.google.com with SMTP id bk1so3180970vkb.5 for ; Thu, 17 Mar 2022 09:59:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ATm6yaRb2ted63v+U2jxRATSlTYqXhv7s7/Btgxrnu4=; b=Z2sHWRXv+4LJe1u6bvzuKIQjCczUP5iBlb7nN8o/1SWW87z5+rpOo9mP0dpevKxTzr VmjFfQyWiau9JQKWsd+fLcHSLieSTjjTbNONILWiPRvXOs0SGaYURxoV/OHrpfIgkMuF rcj3FiydgKPrjx4sKec1YaFGj9eIycA3cDj8eOJj14WyndcEGOzQ9bzQJwRWCwdPEMbg EYQf0rEWD1ItV9GKXicfUEuBhpWpoMahvHH4lgnmzQYvrRuqYbik75jrub5Cv9r268rw B9hc/0qw54jHo1l7Q5HLRND/E6XkEXbZGrezO7Rf/X+ERdGRYvqXTVa+kueUdzR4coh5 zTHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ATm6yaRb2ted63v+U2jxRATSlTYqXhv7s7/Btgxrnu4=; b=d/UVLr3/QMdC745HS0YS8ZWrNsDEoQLUAsC6sY5f2VDpzidIKzbXlnFvVw9IvXFLbs GLT3k7nbGNJUBzSyrvRcqV45mXQyltMK38QOryCGeAsLqBLsjAGaZUv9GXbXkkr3w1Cp 1IYs4zj/wK2U6VCrrtaDFYzvjFRv9vOvnPx+663oatXuvkqC4z3ZFwfBcxtiBLFvyndG a8Mhm87NfaXLAHzKj4CjcSpi7GughUviXfMFJMECBGsjLnqCHKu+P6GMPdWtNXq8gUmX f7Is3bIDEvRIfdIXH7WXAERZmS0P2kvnUrfAvdSPUQ7YxAQVwyz74hYG6Roy1dNa7bOy Nung== X-Gm-Message-State: AOAM5333yUapyxHpVjW+9aZQUfHJUdqy9p+Hfz7h89jDS2PqaX7hEkQv mTrI/ycR6UZfgKYg8vY6TZQg5EQx8e2VvY9tJSir4E+xaw8= X-Google-Smtp-Source: ABdhPJyhDfxu76SEQdlIskvjdmn3W01XRvAugJrIYmNngi20vVDgzaJYU3IxLE0MR6dr4ynJ2e47MnGWSB0832uyCbQ= X-Received: by 2002:a1f:9895:0:b0:331:7132:72cf with SMTP id a143-20020a1f9895000000b00331713272cfmr2353097vke.7.1647536369311; Thu, 17 Mar 2022 09:59:29 -0700 (PDT) MIME-Version: 1.0 References: <20220317094824.423d2a83@hermes.local> In-Reply-To: <20220317094824.423d2a83@hermes.local> From: fwefew 4t4tg <7532yahoo@gmail.com> Date: Thu, 17 Mar 2022 12:59:18 -0400 Message-ID: Subject: Re: need definitions / references To: Stephen Hemminger Cc: users@dpdk.org Content-Type: multipart/alternative; boundary="0000000000000c256705da6cf4cd" X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK usage discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: users-bounces@dpdk.org --0000000000000c256705da6cf4cd Content-Type: text/plain; charset="UTF-8" Mr. Hemminger, Thank you once again for your help. Now, I did see the one-liner DPDK puts in code which you reference: struct rte_eth_thresh { uint8_t pthresh; /**< Ring prefetch threshold. */ uint8_t hthresh; /**< Ring host threshold. */ uint8_t wthresh; /**< Ring writeback threshold. */ }; The problem for me is I don't know what "ring host threshold" or "ring writeback" means. "Ring prefetch threshold" I think I understand. This refers to how mbufs are pending in the ring before it starts writing them onto the wire. This seems to have some connection to tx_rs_thresh. On Thu, Mar 17, 2022 at 12:48 PM Stephen Hemminger < stephen@networkplumber.org> wrote: > On Thu, 17 Mar 2022 12:05:33 -0400 > fwefew 4t4tg <7532yahoo@gmail.com> wrote: > > > DPDK provides but does not define (that I can see at least) these TXQ > > config fields. What are these fields what do they do? > > > > https://doc.dpdk.org/api/structrte__eth__thresh.html > > uint8_t pthresh > > uint8_t hthresh > > uint8_t wthresh > > These are low level details inherited from original Intel NIC's (ie ixgbe) > they only apply to some NICs. They are used to control the ring threshold > values relating to PCI. > > In rte_ethdev.h > /** > * A structure used to configure the ring threshold registers of an Rx/Tx > * queue for an Ethernet port. > */ > struct rte_eth_thresh { > uint8_t pthresh; /**< Ring prefetch threshold. */ > uint8_t hthresh; /**< Ring host threshold. */ > uint8_t wthresh; /**< Ring writeback threshold. */ > }; > > > > And here: What is the RS bit? > > https://doc.dpdk.org/api/structrte__eth__txconf.html > > uint16_t tx_rs_thresh. > > Ready to Send? > > > > > And some what unrelated: What is a ``doorbell"? this is something I > > continue to run into esp. in Mellanox NIC papers? Doorbell counts are > > reported for AWS NICs at least with xstats api: > > > > tx_q0_doorbells: 18812 > > tx_q1_doorbells: 18861 > > These are how many times driver needed to poke hardware to tell it > that new packets are ready to send. > --0000000000000c256705da6cf4cd Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Mr. Hemminger,

Thank you once agai= n for your help.

Now, I did see the one-liner DPDK puts in code whic= h you reference:

struct rte_eth_thresh {
=C2=A0 =C2=A0 =C2=A0 =C2= =A0 uint8_t pthresh; /**< Ring prefetch threshold. */
=C2=A0 =C2=A0 = =C2=A0 =C2=A0 uint8_t hthresh; /**< Ring host threshold. */
=C2=A0 = =C2=A0 =C2=A0 =C2=A0 uint8_t wthresh; /**< Ring writeback threshold. */<= br>};

The problem for me is I don't know what "ring host th= reshold" or "ring writeback" means.

"Ring prefe= tch threshold" I think I understand. This refers to how mbufs are pend= ing in the ring before it starts writing them onto the wire. This seems to = have some connection to=C2=A0tx_rs_thres= h.=C2=A0

On Thu, Mar 17, 2022 at 12= :48 PM Stephen Hemminger <= stephen@networkplumber.org> wrote:
On Thu, 17 Mar 2022 12:05:33 -0400
fwefew 4t4tg <7= 532yahoo@gmail.com> wrote:

> DPDK provides but does not define (that I can see at least) these TXQ<= br> > config fields. What are these fields what do they do?
>
> https://doc.dpdk.org/api/structrte__eth__= thresh.html
> uint8_t pthresh
> uint8_t hthresh
> uint8_t wthresh

These are low level details inherited from original Intel NIC's (ie ixg= be)
they only apply to some NICs. They are used to control the ring threshold values relating to PCI.

In rte_ethdev.h
/**
=C2=A0* A structure used to configure the ring threshold registers of an Rx= /Tx
=C2=A0* queue for an Ethernet port.
=C2=A0*/
struct rte_eth_thresh {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint8_t pthresh; /**< Ring prefetch threshol= d. */
=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint8_t hthresh; /**< Ring host threshold. *= /
=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint8_t wthresh; /**< Ring writeback thresho= ld. */
};


> And here: What is the RS bit?
> https://doc.dpdk.org/api/structrte__eth__= txconf.html
> uint16_t tx_rs_thresh.

Ready to Send?

>
> And some what unrelated: What is a ``doorbell"? this is something= I
> continue to run into esp. in Mellanox NIC papers? Doorbell counts are<= br> > reported for AWS NICs at least with xstats api:
>
> tx_q0_doorbells: 18812
> tx_q1_doorbells: 18861

These are how many times driver needed to poke hardware to tell it
that new packets are ready to send.
--0000000000000c256705da6cf4cd--