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* Error while compiling dpdk 21.08 for arm64
@ 2021-10-29 14:04 animesh tripathi
  2021-10-29 14:33 ` David Marchand
  0 siblings, 1 reply; 2+ messages in thread
From: animesh tripathi @ 2021-10-29 14:04 UTC (permalink / raw)
  To: users


[-- Attachment #1.1: Type: text/plain, Size: 5373 bytes --]

Hi Team,

I am trying to compile dpdk 21.08 for arm64, but I am getting the following
error while compiling. I am compiling dpdk 21.08 on arm64 platform only.

ninja: Entering directory `build'
[2/399] Compiling C object 'drivers/a715181@@tmp_rte_event_cnxk@sta
/event_cnxk_cn10k_worker_deq.c.o'.
FAILED: drivers/a715181@@tmp_rte_event_cnxk@sta
/event_cnxk_cn10k_worker_deq.c.o
cc -Idrivers/a715181@@tmp_rte_event_cnxk@sta -Idrivers -I../drivers
-Idrivers/event/cnxk -I../drivers/event/cnxk -Ilib/eventdev
-I../lib/eventdev -I. -I../ -Iconfig -I../config -Ilib/eal/include
-I../lib/eal/include -Ilib/eal/linux/include -I../lib/eal/linux/include
-Ilib/eal/arm/include -I../lib/eal/arm/include -Ilib/eal/common
-I../lib/eal/common -Ilib/eal -I../lib/eal -Ilib/kvargs -I../lib/kvargs
-Ilib/telemetry/../metrics -I../lib/telemetry/../metrics -Ilib/telemetry
-I../lib/telemetry -Ilib/ring -I../lib/ring -Ilib/ethdev -I../lib/ethdev
-Ilib/net -I../lib/net -Ilib/mbuf -I../lib/mbuf -Ilib/mempool
-I../lib/mempool -Ilib/meter -I../lib/meter -Ilib/hash -I../lib/hash
-Ilib/rcu -I../lib/rcu -Ilib/timer -I../lib/timer -Ilib/cryptodev
-I../lib/cryptodev -Idrivers/bus/pci -I../drivers/bus/pci
-I../drivers/bus/pci/linux -Ilib/pci -I../lib/pci -Idrivers/common/cnxk
-I../drivers/common/cnxk -Idrivers/common/cnxk/../../bus/pci
-I../drivers/common/cnxk/../../bus/pci
-Idrivers/common/cnxk/../../../lib/net
-I../drivers/common/cnxk/../../../lib/net -Ilib/security -I../lib/security
-Idrivers/net/cnxk -I../drivers/net/cnxk -Idrivers/bus/vdev
-I../drivers/bus/vdev -Idrivers/mempool/cnxk -I../drivers/mempool/cnxk
-fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch
-O3 -include rte_config.h -Wextra -Wcast-qual -Wdeprecated -Wformat
-Wformat-nonliteral -Wformat-security -Wmissing-declarations
-Wmissing-prototypes -Wnested-externs -Wold-style-definition
-Wpointer-arith -Wsign-compare -Wstrict-prototypes -Wundef -Wwrite-strings
-Wno-missing-field-initializers -D_GNU_SOURCE -fPIC -march=armv8.2-a+crypto
-DALLOW_EXPERIMENTAL_API -DALLOW_INTERNAL_API -Wno-format-truncation
-flax-vector-conversions -Wno-strict-aliasing
-DRTE_LOG_DEFAULT_LOGTYPE=pmd.event.cnxk -MD -MQ 'drivers/a715181@
@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o' -MF
'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o.d'
-o 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o'
-c ../drivers/event/cnxk/cn10k_worker_deq.c
{standard input}: Assembler messages:
{standard input}:30: Error: reg pair must start from even reg at operand 1
-- `caspl x9,x10,x9,x10,[x2]'
{standard input}:309: Error: reg pair must start from even reg at operand 1
-- `caspl x25,x26,x25,x26,[x2]'
{standard input}:1005: Error: reg pair must start from even reg at operand
1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:1298: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:4502: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:5570: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:6321: Error: reg pair must start from even reg at operand
1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:6681: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:7456: Error: reg pair must start from even reg at operand
1 -- `caspl x13,x14,x13,x14,[x2]'
{standard input}:7833: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:8623: Error: reg pair must start from even reg at operand
1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:8983: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:9759: Error: reg pair must start from even reg at operand
1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:10136: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:16489: Error: reg pair must start from even reg at operand
1 -- `caspl x17,x18,x17,x18,[x3]'
{standard input}:17860: Error: reg pair must start from even reg at operand
1 -- `caspl x17,x18,x17,x18,[x2]'
{standard input}:19972: Error: reg pair must start from even reg at operand
1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:21231: Error: reg pair must start from even reg at operand
1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:21710: Error: reg pair must start from even reg at operand
1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:22617: Error: reg pair must start from even reg at operand
1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:23112: Error: reg pair must start from even reg at operand
1 -- `caspl x25,x26,x25,x26,[x4]'
{standard input}:24032: Error: reg pair must start from even reg at operand
1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:24465: Error: reg pair must start from even reg at operand
1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:25329: Error: reg pair must start from even reg at operand
1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:29560: Error: reg pair must start from even reg at operand
1 -- `caspl x9,x10,x9,x10,[x2]'

The complete error is also attached in the file error_dpdk_21_08.txt file.

Can you please help me out in resolving this error.

Thanks,
Animesh Tripathi

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[-- Attachment #2: error_dpdk21_08.txt --]
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ninja: Entering directory `build'
[2/399] Compiling C object 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o'.
FAILED: drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o
cc -Idrivers/a715181@@tmp_rte_event_cnxk@sta -Idrivers -I../drivers -Idrivers/event/cnxk -I../drivers/event/cnxk -Ilib/eventdev -I../lib/eventdev -I. -I../ -Iconfig -I../config -Ilib/eal/include -I../lib/eal/include -Ilib/eal/linux/include -I../lib/eal/linux/include -Ilib/eal/arm/include -I../lib/eal/arm/include -Ilib/eal/common -I../lib/eal/common -Ilib/eal -I../lib/eal -Ilib/kvargs -I../lib/kvargs -Ilib/telemetry/../metrics -I../lib/telemetry/../metrics -Ilib/telemetry -I../lib/telemetry -Ilib/ring -I../lib/ring -Ilib/ethdev -I../lib/ethdev -Ilib/net -I../lib/net -Ilib/mbuf -I../lib/mbuf -Ilib/mempool -I../lib/mempool -Ilib/meter -I../lib/meter -Ilib/hash -I../lib/hash -Ilib/rcu -I../lib/rcu -Ilib/timer -I../lib/timer -Ilib/cryptodev -I../lib/cryptodev -Idrivers/bus/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux -Ilib/pci -I../lib/pci -Idrivers/common/cnxk -I../drivers/common/cnxk -Idrivers/common/cnxk/../../bus/pci -I../drivers/common/cnxk/../../bus/pci -Idrivers/common/cnxk/../../../lib/net -I../drivers/common/cnxk/../../../lib/net -Ilib/security -I../lib/security -Idrivers/net/cnxk -I../drivers/net/cnxk -Idrivers/bus/vdev -I../drivers/bus/vdev -Idrivers/mempool/cnxk -I../drivers/mempool/cnxk -fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h -Wextra -Wcast-qual -Wdeprecated -Wformat -Wformat-nonliteral -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wsign-compare -Wstrict-prototypes -Wundef -Wwrite-strings -Wno-missing-field-initializers -D_GNU_SOURCE -fPIC -march=armv8.2-a+crypto -DALLOW_EXPERIMENTAL_API -DALLOW_INTERNAL_API -Wno-format-truncation -flax-vector-conversions -Wno-strict-aliasing -DRTE_LOG_DEFAULT_LOGTYPE=pmd.event.cnxk -MD -MQ 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o' -MF 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o.d' -o 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq.c.o' -c ../drivers/event/cnxk/cn10k_worker_deq.c
{standard input}: Assembler messages:
{standard input}:30: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:309: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:1005: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:1298: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:4502: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:5570: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:6321: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:6681: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:7456: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x2]'
{standard input}:7833: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:8623: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:8983: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:9759: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:10136: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x2]'
{standard input}:16489: Error: reg pair must start from even reg at operand 1 -- `caspl x17,x18,x17,x18,[x3]'
{standard input}:17860: Error: reg pair must start from even reg at operand 1 -- `caspl x17,x18,x17,x18,[x2]'
{standard input}:19972: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:21231: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:21710: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:22617: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:23112: Error: reg pair must start from even reg at operand 1 -- `caspl x25,x26,x25,x26,[x4]'
{standard input}:24032: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:24465: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:25329: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:29560: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:30943: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:32916: Error: reg pair must start from even reg at operand 1 -- `caspl x23,x24,x23,x24,[x4]'
{standard input}:34475: Error: reg pair must start from even reg at operand 1 -- `caspl x23,x24,x23,x24,[x4]'
{standard input}:35476: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:36011: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:36977: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:37523: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:38498: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:39104: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x5]'
{standard input}:40139: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:40754: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x4]'
{standard input}:41798: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:42187: Error: reg pair must start from even reg at operand 1 -- `caspl x27,x28,x27,x28,[x2]'
{standard input}:42974: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:47178: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x2]'
{standard input}:48013: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:48456: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x2]'
{standard input}:49300: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:49774: Error: reg pair must start from even reg at operand 1 -- `caspl x17,x18,x17,x18,[x3]'
{standard input}:50648: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:51130: Error: reg pair must start from even reg at operand 1 -- `caspl x17,x18,x17,x18,[x2]'
{standard input}:52013: Error: reg pair must start from even reg at operand 1 -- `caspl x7,x8,x7,x8,[x2]'
{standard input}:53354: Error: reg pair must start from even reg at operand 1 -- `caspl x7,x8,x7,x8,[x2]'
{standard input}:57625: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:59056: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:63540: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:64035: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x4]'
{standard input}:64953: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:65456: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x4]'
{standard input}:66956: Error: reg pair must start from even reg at operand 1 -- `caspl x23,x24,x23,x24,[x4]'
{standard input}:68535: Error: reg pair must start from even reg at operand 1 -- `caspl x23,x24,x23,x24,[x4]'
{standard input}:69539: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:70077: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:71036: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:71576: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x4]'
{standard input}:72545: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:74183: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:75838: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:77412: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:82498: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:84173: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:85858: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:86548: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x5]'
{standard input}:87663: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:88361: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x4]'
[3/399] Compiling C object 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq_tmo.c.o'.
FAILED: drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq_tmo.c.o
cc -Idrivers/a715181@@tmp_rte_event_cnxk@sta -Idrivers -I../drivers -Idrivers/event/cnxk -I../drivers/event/cnxk -Ilib/eventdev -I../lib/eventdev -I. -I../ -Iconfig -I../config -Ilib/eal/include -I../lib/eal/include -Ilib/eal/linux/include -I../lib/eal/linux/include -Ilib/eal/arm/include -I../lib/eal/arm/include -Ilib/eal/common -I../lib/eal/common -Ilib/eal -I../lib/eal -Ilib/kvargs -I../lib/kvargs -Ilib/telemetry/../metrics -I../lib/telemetry/../metrics -Ilib/telemetry -I../lib/telemetry -Ilib/ring -I../lib/ring -Ilib/ethdev -I../lib/ethdev -Ilib/net -I../lib/net -Ilib/mbuf -I../lib/mbuf -Ilib/mempool -I../lib/mempool -Ilib/meter -I../lib/meter -Ilib/hash -I../lib/hash -Ilib/rcu -I../lib/rcu -Ilib/timer -I../lib/timer -Ilib/cryptodev -I../lib/cryptodev -Idrivers/bus/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux -Ilib/pci -I../lib/pci -Idrivers/common/cnxk -I../drivers/common/cnxk -Idrivers/common/cnxk/../../bus/pci -I../drivers/common/cnxk/../../bus/pci -Idrivers/common/cnxk/../../../lib/net -I../drivers/common/cnxk/../../../lib/net -Ilib/security -I../lib/security -Idrivers/net/cnxk -I../drivers/net/cnxk -Idrivers/bus/vdev -I../drivers/bus/vdev -Idrivers/mempool/cnxk -I../drivers/mempool/cnxk -fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h -Wextra -Wcast-qual -Wdeprecated -Wformat -Wformat-nonliteral -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wsign-compare -Wstrict-prototypes -Wundef -Wwrite-strings -Wno-missing-field-initializers -D_GNU_SOURCE -fPIC -march=armv8.2-a+crypto -DALLOW_EXPERIMENTAL_API -DALLOW_INTERNAL_API -Wno-format-truncation -flax-vector-conversions -Wno-strict-aliasing -DRTE_LOG_DEFAULT_LOGTYPE=pmd.event.cnxk -MD -MQ 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq_tmo.c.o' -MF 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq_tmo.c.o.d' -o 'drivers/a715181@@tmp_rte_event_cnxk@sta/event_cnxk_cn10k_worker_deq_tmo.c.o' -c ../drivers/event/cnxk/cn10k_worker_deq_tmo.c
{standard input}: Assembler messages:
{standard input}:29: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:557: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:1085: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:1322: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x3]'
{standard input}:1638: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:1875: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x3]'
{standard input}:2467: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x3]'
{standard input}:3096: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x3]'
{standard input}:3735: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x3]'
{standard input}:4384: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x3]'
{standard input}:4748: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:5350: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:5952: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:6592: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:7536: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x3]'
{standard input}:8223: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x3]'
{standard input}:8927: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x3]'
{standard input}:9650: Error: reg pair must start from even reg at operand 1 -- `caspl x21,x22,x21,x22,[x3]'
{standard input}:10051: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:10748: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:11445: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:12173: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:12902: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:13246: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x3]'
{standard input}:13707: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:14051: Error: reg pair must start from even reg at operand 1 -- `caspl x19,x20,x19,x20,[x3]'
{standard input}:14513: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:14863: Error: reg pair must start from even reg at operand 1 -- `caspl x17,x18,x17,x18,[x3]'
{standard input}:15342: Error: reg pair must start from even reg at operand 1 -- `caspl x15,x16,x15,x16,[x3]'
{standard input}:15692: Error: reg pair must start from even reg at operand 1 -- `caspl x17,x18,x17,x18,[x3]'
{standard input}:16170: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:16479: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:16976: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:17285: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:17783: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:18102: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:18623: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:18942: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:23481: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:24228: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:24663: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:25436: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:28368: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:29294: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:29866: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:30221: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:30682: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:31037: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:31498: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:31870: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:32350: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:32722: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:41086: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:42157: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:43235: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:44324: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:45025: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:46050: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:47075: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:48120: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:49166: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:50348: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:51530: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:52730: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:56915: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:57758: Error: reg pair must start from even reg at operand 1 -- `caspl x13,x14,x13,x14,[x3]'
{standard input}:60329: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:60619: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:61151: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:61441: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:61973: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:62269: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:62813: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:63109: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:63653: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:64555: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x4]'
{standard input}:65457: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:66374: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:67291: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:68189: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:69087: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:70018: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:70950: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:71927: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:72904: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:73933: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:74962: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:75950: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:76938: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:77953: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:78968: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:80041: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x3]'
{standard input}:81114: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:82204: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x2]'
{standard input}:83655: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:84582: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:85146: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:85514: Error: reg pair must start from even reg at operand 1 -- `caspl x7,x8,x7,x8,[x2]'
{standard input}:86100: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x3]'
{standard input}:86468: Error: reg pair must start from even reg at operand 1 -- `caspl x7,x8,x7,x8,[x2]'
{standard input}:87056: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:88141: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:89226: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:90333: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:91440: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:92467: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:93494: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:94523: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:95552: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:96719: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:97886: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:99065: Error: reg pair must start from even reg at operand 1 -- `caspl x11,x12,x11,x12,[x2]'
{standard input}:110028: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:111210: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:112397: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:113590: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:114359: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:115675: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:116991: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
{standard input}:118323: Error: reg pair must start from even reg at operand 1 -- `caspl x9,x10,x9,x10,[x1]'
ninja: build stopped: subcommand failed.

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: Error while compiling dpdk 21.08 for arm64
  2021-10-29 14:04 Error while compiling dpdk 21.08 for arm64 animesh tripathi
@ 2021-10-29 14:33 ` David Marchand
  0 siblings, 0 replies; 2+ messages in thread
From: David Marchand @ 2021-10-29 14:33 UTC (permalink / raw)
  To: animesh tripathi; +Cc: users

On Fri, Oct 29, 2021 at 4:04 PM animesh tripathi <anitrip.444@gmail.com> wrote:
>
> Hi Team,
>
> I am trying to compile dpdk 21.08 for arm64, but I am getting the following error while compiling. I am compiling dpdk 21.08 on arm64 platform only.
>

This is a known issue with some toolchains.
See: https://bugs.dpdk.org/show_bug.cgi?id=697
If you don't need this driver, you can disable it by passing meson
option -Ddisable_drivers=common/cnxk


-- 
David Marchand


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2021-10-29 14:33 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-29 14:04 Error while compiling dpdk 21.08 for arm64 animesh tripathi
2021-10-29 14:33 ` David Marchand

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