[AMD Official Use Only - General]

Hi Reshma,

Please find my response inline.

Thanks & Regards,
Sivaprasad

From: Pattan, Reshma <reshma.pattan@intel.com>
Sent: Wednesday, November 29, 2023 7:00 PM
To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>; users@dpdk.org
Subject: RE: AMD power monitor support


[AMD Official Use Only - General]

Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.

Hi Siva,

Thanks for the information.  Could you please clarify below


  1.  So should we see C1 increment in below stats.  Or is it CX?
[Siva] It ll be accounted in "Cx"

  1.  Are there any specific kernel boot parameter setting we need?  to get into MWAITX.
[Siva] No additional boot parameters required.

# cpupower -c 2 monitor

    | Mperf              || Idle_Stats
CPU| C0   | Cx   | Freq  || POLL | C1   | C2

Thanks,
Reshma

From: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com<mailto:Sivaprasad.Tummala@amd.com>>
Sent: Wednesday, November 29, 2023 11:19 AM
To: Pattan, Reshma <reshma.pattan@intel.com<mailto:reshma.pattan@intel.com>>; users@dpdk.org<mailto:users@dpdk.org>
Subject: RE: AMD power monitor support


[AMD Official Use Only - General]

Hi Reshma,

Yes, with pmd-mgmt="monitor" allows AMD power monitor on Genoa.
You can monitor the same using "cpupower -c <n> monitor" tool.

Thanks & Regards,
Sivaprasad

From: Pattan, Reshma <reshma.pattan@intel.com<mailto:reshma.pattan@intel.com>>
Sent: Wednesday, November 29, 2023 4:04 PM
To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com<mailto:Sivaprasad.Tummala@amd.com>>; users@dpdk.org<mailto:users@dpdk.org>
Subject: AMD power monitor support

Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.

Hi Sivaprasad,

I am running dpdk l3fwd-power application in "monitor mode" on AMD Genoa using below command.
./dpdk-l3fwd-power -l 1-3 -- -p 0x1 --config="(0,0,2),(0,1,3)" --pmd-mgmt=monitor

Does it allow cores to  use DPDK AMD power monitor support  feature based of mwaitx (https://patchwork.dpdk.org/project/dpdk/patch/20231009140546.862553-3-sivaprasad.tummala@amd.com/)?
If so how do I confirm if the cores are entering implementation dependant C1 State. If any pointers please let me know.

Thanks,
Reshma