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Subject: RE: Whether the creatation of flow rules of i40e NIC support tcp port mask Thread-Topic: Whether the creatation of flow rules of i40e NIC support tcp port mask Thread-Index: AdoA1zKopRhb/mz0T4qZQSq4v/eEUgAjryTQ Date: Wed, 18 Oct 2023 01:54:56 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: LV2PR11MB5997:EE_|CH3PR11MB8564:EE_ x-ms-office365-filtering-correlation-id: 6f268e5f-b89e-4ad1-295e-08dbcf7d3a96 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: XrAdz4O1zRrioShGc/9FwRDT4E3uav/Y+Hh4dXAiRi0cl7YnCQyJc4kUoGKvXfY8Sf48/IQ/N4iyHunsedwqkY5KRDeCEbpLOou+SLogSJMpoK90FoiXy32SFks9z4njeIQuPiB6DAXhFzyJFSXH85FajKyE/jpVapeesxQGzgaiFrn4PvTIUwIsS/Pk2R7wGxRL7x/a5n0t1EMOOauSPBD11qtAOzTvrg6VkUAmNNqcPFPMKwuaYPoR8OsFxE/g8PTImv+XbGf7KpKB0KCtvPki0luOciX5xnUzO9IIkk6ISs6EuvesECPcQGOG+VOukx59LlkAGOWk5GqPP1eqICPwLdmV2Xf1RjWXBU9ldre8hOEDnuccvRfg8OpyL8Xr0ot9eQBtLLGYqUDoqR3Wi6vO1Z4O+WA29wDHGd4uUBdvdIh95fYQhX9kzaelaSIhOtfIKr2jDtDS0iysqDMzHaDV+AI99eWCHWxwr7GtzTAA1pWutjJX7asfYehcVmE0LbQCSXPHbN2k5tPIAumkRNDMCUecCYtQICegZNpnklBxjkcImjta40l9aEcA5HzzmF5BVkrltAnog4Dzt3F4kUEiJ2NVYS1YJLlCXNhol30its277cg2IxDdX12JMYSX x-forefront-antispam-report: CIP:255.255.255.255; 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charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable Hi Jiangheng, That=1B$B!G=1B(Bs because i40e only supports perfect match. BR, Beilei From: jiangheng (G) Sent: Tuesday, October 17, 2023 4:52 PM To: Xing, Beilei ; users@dpdk.org Cc: Fanbin(Kira,2012 Blue Lab.) Subject: Whether the creatation of flow rules of i40e NIC support tcp port = mask Hi beilei=1B$B!$=1B(B I would like to create flows using tcp port mask, but it seems only mask 0x= ffff or 0x0 work, Does flow rlue can be created using other mask? I40e dirver was using now. Here is my code: struct rte_flow_attr attr; struct rte_flow_item pattern[MAX_PATTERN_NUM]; struct rte_flow_action action[MAX_ACTION_NUM]; struct rte_flow *flow =3D NULL; struct rte_flow_action_queue queue =3D { .index =3D queue_id }; struct rte_flow_item_ipv4 ip_spec; struct rte_flow_item_ipv4 ip_mask; struct rte_flow_item_tcp tcp_spec; struct rte_flow_item_tcp tcp_mask; int res; memset_s(pattern, sizeof(pattern), 0, sizeof(pattern)); memset_s(action, sizeof(action), 0, sizeof(action)); /* * set the rule attribute. * in this case only ingress packets will be checked. */ memset_s(&attr, sizeof(struct rte_flow_attr), 0, sizeof(struct rte_flow= _attr)); attr.ingress =3D 1; /* * create the action sequence. * one action only, move packet to queue */ action[0].type =3D RTE_FLOW_ACTION_TYPE_QUEUE; action[0].conf =3D &queue; action[1].type =3D RTE_FLOW_ACTION_TYPE_END; // not limit eth header pattern[0].type =3D RTE_FLOW_ITEM_TYPE_ETH; // ip header memset_s(&ip_spec, sizeof(struct rte_flow_item_ipv4), 0, sizeof(struct = rte_flow_item_ipv4)); memset_s(&ip_mask, sizeof(struct rte_flow_item_ipv4), 0, sizeof(struct = rte_flow_item_ipv4)); ip_spec.hdr.dst_addr =3D dst_ip; ip_mask.hdr.dst_addr =3D EMPTY_MASK; ip_spec.hdr.src_addr =3D src_ip; ip_mask.hdr.src_addr =3D EMPTY_MASK; pattern[1].type =3D RTE_FLOW_ITEM_TYPE_IPV4; pattern[1].spec =3D &ip_spec; pattern[1].mask =3D &ip_mask; // tcp header, full mask 0xffff memset_s(&tcp_spec, sizeof(struct rte_flow_item_tcp), 0, sizeof(struct = rte_flow_item_tcp)); memset_s(&tcp_mask, sizeof(struct rte_flow_item_tcp), 0, sizeof(struct = rte_flow_item_tcp)); pattern[2].type =3D RTE_FLOW_ITEM_TYPE_TCP; // 2: pattern 2 is tcp head= er tcp_spec.hdr.src_port =3D src_port; tcp_spec.hdr.dst_port =3D dst_port; tcp_mask.hdr.src_port =3D 0xffff; // only 0xffff and 0x0 work tcp_mask.hdr.dst_port =3D 0xffff; // only 0xffff and 0x0 work pattern[2].spec =3D &tcp_spec; pattern[2].mask =3D &tcp_mask; /* the final level must be always type end */ pattern[3].type =3D RTE_FLOW_ITEM_TYPE_END; res =3D rte_flow_validate(port_id, &attr, pattern, action, error); if (!res) { flow =3D rte_flow_create(port_id, &attr, pattern, action, error); } else { LSTACK_LOG(ERR, PORT, "rte_flow_create.rte_flow_validate error, res= %d \n", res); } Looking forward to your favourable reply. --_000_LV2PR11MB59978448F7C340F2F508A6B6F7D5ALV2PR11MB5997namp_ Content-Type: text/html; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable

Hi Jiangheng, =

 

That=1B$B!G=1B(Bs b= ecause i40e only supports perfect match.

 

BR,

Beilei

 

From: = jiangheng (G) <jiangheng14@huawei.com>
Sent: Tuesday, October 17, 2023 4:52 PM
To: Xing, Beilei <beilei.xing@intel.com>; users@dpdk.org
Cc: Fanbin(Kira,2012 Blue Lab.) <fanbin12@huawei.com>
Subject: Whether the creatation of flow rules of i40e NIC support tc= p port mask

 =

Hi beilei=1B$B!$=1B(B

I would like to create flows using tcp port mask,= but it seems only mask 0xffff or 0x0 work, Does flow rlue can be created using ot= her mask?

I40e dirver was using now.

   

Here is my code:

    struct rte_flow_attr attr;

    struct rte_flow_item pattern[M= AX_PATTERN_NUM];

    struct rte_flow_action action[= MAX_ACTION_NUM];

    struct rte_flow *flow =3D NULL= ;

    struct rte_flow_action_queue q= ueue =3D { .index =3D queue_id };

    struct rte_flow_item_ipv4 ip_s= pec;

    struct rte_flow_item_ipv4 ip_m= ask;

 

    struct rte_flow_item_tcp = tcp_spec;

    struct rte_flow_item_tcp tcp_m= ask;

    int res;

 

    memset_s(pattern, sizeof(= pattern), 0, sizeof(pattern));

    memset_s(action, sizeof(action= ), 0, sizeof(action));

 

    /*

     * set the rule attribute= .

     * in this case only ingr= ess packets will be checked.

     */

    memset_s(&attr, sizeof(str= uct rte_flow_attr), 0, sizeof(struct rte_flow_attr));

    attr.ingress =3D 1;=

 

    /*

     * create the action sequ= ence.

     * one action only, = move packet to queue

     */

    action[0].type =3D RTE_FLOW_AC= TION_TYPE_QUEUE;

    action[0].conf =3D &queue;=

    action[1].type =3D RTE_FLOW_AC= TION_TYPE_END;

 

    // not limit eth header

    pattern[0].type =3D RTE_FLOW_I= TEM_TYPE_ETH;

 

    // ip header

    memset_s(&ip_spec, sizeof(= struct rte_flow_item_ipv4), 0, sizeof(struct rte_flow_item_ipv4));

    memset_s(&ip_mask, sizeof(= struct rte_flow_item_ipv4), 0, sizeof(struct rte_flow_item_ipv4));

    ip_spec.hdr.dst_addr =3D dst_i= p;

    ip_mask.hdr.dst_addr =3D EMPTY= _MASK;

    ip_spec.hdr.src_addr =3D src_i= p;

    ip_mask.hdr.src_addr =3D EMPTY= _MASK;

    pattern[1].type =3D RTE_FLOW_I= TEM_TYPE_IPV4;

    pattern[1].spec =3D &ip_sp= ec;

    pattern[1].mask =3D &ip_ma= sk;

 

    // tcp header, full mask = 0xffff

    memset_s(&tcp_spec, sizeof= (struct rte_flow_item_tcp), 0, sizeof(struct rte_flow_item_tcp));

    memset_s(&tcp_mask, sizeof= (struct rte_flow_item_tcp), 0, sizeof(struct rte_flow_item_tcp));

    pattern[2].type =3D RTE_FLOW_I= TEM_TYPE_TCP; // 2: pattern 2 is tcp header

    tcp_spec.hdr.src_port =3D src_= port;

    tcp_spec.hdr.dst_port =3D dst_= port;

    t= cp_mask.hdr.src_port =3D 0xffff;  // only 0xffff and 0x0 work

    t= cp_mask.hdr.dst_port =3D 0xffff; // only 0xffff and 0x0 work

    pattern[2].spec =3D &tcp_s= pec;

    pattern[2].mask =3D &tcp_m= ask;

 

    /* the final level must b= e always type end */

    pattern[3].type =3D RTE_FLOW_I= TEM_TYPE_END;

    res =3D rte_flow_validate(port= _id, &attr, pattern, action, error);

    if (!res) {

        flow = =3D rte_flow_create(port_id, &attr, pattern, action, error);=

    } else {

        LSTACK= _LOG(ERR, PORT, "rte_flow_create.rte_flow_validate error, res %d \n&qu= ot;, res);

    }

 

Looking forward to your favourable reply.

 

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