From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from userp2120.oracle.com (userp2120.oracle.com [156.151.31.85]) by dpdk.org (Postfix) with ESMTP id E83E2F72 for ; Fri, 18 Jan 2019 19:53:03 +0100 (CET) Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id x0IInFmt077433; Fri, 18 Jan 2019 18:53:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=mime-version : message-id : date : from : sender : to : subject : references : in-reply-to : content-type : content-transfer-encoding; s=corp-2018-07-02; bh=eVi2P2PJ8Jr5GnIaVrPgN4DjqSvvvXNHm2+ypweRQG0=; b=lj22bRvOUAjWNnBjuqf03qIIQEm5ew+e4RP/QX2FiS+lGs+5D4HEuK31hwBca5Mju4ZY CzVBIItvkobBPH7CyKESXZ7iSGLLqBNzgiKquCoq9KzUTe4LCdSvLCbKMI3Hta/9bJKz MMt7YWurMmMnFr4HtIndiCLQzGVKCaeBvKur3kCMuUeyXzdZZyWv48lW7ScwrvyYfdIg jWJl8qHpsOoCTVNhDnhF3J2kbfAXJznvefYLGvJ3eKqdh0D5QORgbPLONidrmCP+y+rA cbpi62wuuNOw8u6BjznUh0AO6X10fu2DEzc4qcDZR/PzitepMD0NvgOIx2/7hmMkBT1f dw== Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by userp2120.oracle.com with ESMTP id 2pybjsq7jm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 18 Jan 2019 18:53:02 +0000 Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id x0IIr1fL011035 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 18 Jan 2019 18:53:01 GMT Received: from abhmp0018.oracle.com (abhmp0018.oracle.com [141.146.116.24]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id x0IIr1p6021899; Fri, 18 Jan 2019 18:53:01 GMT MIME-Version: 1.0 Message-ID: Date: Fri, 18 Jan 2019 10:52:56 -0800 (PST) From: Changchun Zhang Sender: Changchun Zhang To: "Trahe, Fiona" , "Pathak, Pravin" , users@dpdk.org References: <03fd164b-112b-4e44-a5b0-15c6e3703662@default> <348A99DA5F5B7549AA880327E580B435896CD08F@IRSMSX101.ger.corp.intel.com> <168A68C163D584429EF02A476D5274424DEA9B7C@FMSMSX108.amr.corp.intel.com> <5e87ae90-94b9-4e85-9172-46b95365ec36@default> <348A99DA5F5B7549AA880327E580B435896CD528@IRSMSX101.ger.corp.intel.com> <400475b7-869e-4281-9d31-058f96957fe1@default> <348A99DA5F5B7549AA880327E580B435896CD61A@IRSMSX101.ger.corp.intel.com> <348A99DA5F5B7549AA880327E580B435896CD7E0@IRSMSX101.ger.corp.intel.com> In-Reply-To: <348A99DA5F5B7549AA880327E580B435896CD7E0@IRSMSX101.ger.corp.intel.com> X-Priority: 3 X-Mailer: Oracle Beehive Extensions for Outlook 2.0.1.9.1 (1003210) [OL 15.0.5093.0 (x86)] Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9140 signatures=668682 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901180135 Subject: Re: [dpdk-users] Run-to-completion or Pipe-line for QAT PMD in DPDK X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK usage discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Jan 2019 18:53:04 -0000 HI Fiona, Thanks! Changchun (Alex) -----Original Message----- From: Trahe, Fiona [mailto:fiona.trahe@intel.com]=20 Sent: Friday, January 18, 2019 1:21 PM To: Changchun Zhang ; Pathak, Pravin ; users@dpdk.org Cc: Trahe, Fiona Subject: RE: [dpdk-users] Run-to-completion or Pipe-line for QAT PMD in DPD= K Hi Alex, > [changchun] Many thanks! So from this limitation, we can conclude=20 > that Lcore can only dequeue the QAT queue which was enqueued by=20 > itself, right. If so, then the Crypto device lib doc may be a little misl= eading, at least some notes should be put there. [Fiona] Limitations are generally on the device documentation - it wouldn't= make sense to pollute the lib with the limitations of individual devices. = (though I understand it's easy to miss the limitations) As mentioned before= , if this is an important use-case for you we would be interested in hearin= g about it, and we could investigate performant ways to remove the limitati= on. [changchun] Currently we don't see if it is necessary to remove this limit= ation or not. But we do need to confirm what the relationship between logic= al core, queue pair, and crypto device. As my understanding, no matter pipe= line or current limitation, the QAT accepts the request from the RX queue = of a queue pair and after the processing, the data will be put the TX queue= on the same queue pair, it is right? Say enqueue data to the RX queue of Q= ueue pair 1, the return data would always be put to the TX queue of Queue p= air 1, not possible to other Queue pair's TX queue, right? Let me know if y= ou did not get my question.=20