From: Vincent Li <vincent.mc.li@gmail.com>
To: Ding Ma <mdyuki1016@gmail.com>
Cc: Vincent Li <vincent.mc.li@gmail.com>,
Stephen Hemminger <stephen@networkplumber.org>,
users@dpdk.org
Subject: Re: [dpdk-users] Need help: Generate core list error. rte_eal port num [0] is not match the pciidlist [4]
Date: Wed, 3 Jun 2020 17:47:07 -0700 (PDT)
Message-ID: <alpine.OSX.2.21.2006031740570.52654@sea-ml-00029224.olympus.f5net.com> (raw)
In-Reply-To: <CA+h+_BuUO4uskn3+z9P-8MjkCUfaXuLi_H9LLk9MdaE_imFwqA@mail.gmail.com>
On Wed, 3 Jun 2020, Ding Ma wrote:
> Thanks for reply.
> BTW I guess "CONFIG_RTE_MAX_LCORE=128" means no more than 128 cores. But what does "CONFIG_RTE_MAX_LCORE_FREQS=64" mean?
>
right, CONFIG_RTE_MAX_LCORE_FREQS=64 is irrelevant here I think, something
relate to power.
# Compile librte_power
CONFIG_RTE_LIBRTE_POWER=y
CONFIG_RTE_LIBRTE_POWER_DEBUG=n
CONFIG_RTE_MAX_LCORE_FREQS=64
By the way, I think the patches Stephen talked about to remove
RTE_MAX_LCORE constrains is this:
Re: [dpdk-dev] [PATCH 0/4] Extend --lcores to run on cores > RTE_MAX_LCORE
https://marc.info/?l=dpdk-dev&m=159112164120276&w=2
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Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CA+h+_BuFT_cqGsxdyPOz8EtMOMdvZi4yWdW28=ZXsh70uL=Xzg@mail.gmail.com>
2020-06-03 1:04 ` Ding Ma
2020-06-03 2:21 ` Stephen Hemminger
2020-06-03 2:34 ` Ding Ma
2020-06-03 20:51 ` Vincent Li
2020-06-03 21:35 ` Ding Ma
2020-06-04 0:47 ` Vincent Li [this message]
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