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From: "Xiaoping Yan (NSB)" <xiaoping.yan@nokia-sbell.com>
To: "users@dpdk.org" <users@dpdk.org>
Subject: rte_power_monitor_multi can not enter C0.2/C0.1 state (RTM transaction abort with 0)
Date: Mon, 27 Feb 2023 13:52:46 +0000	[thread overview]
Message-ID: <cf62d874ecc1443ca76095f12345c132@nokia-sbell.com> (raw)

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Hi,

I'm trying power saving feature in my server with intel sapphire rapid CPU. With "tsx=on" kernel parameter, I have both rtm and waitpkg available in CPU flag.
I tried rte_power_monitor_multi API to monitor on multiple address, but it never enters C0.2/C0.1 state.
To find the reason I patched the code to return the transaction abort code as below:
        /* transaction abort, possible write to one of wait addresses */
        if (rc != RTE_XBEGIN_STARTED)
-               return 0;
+               return rc;
and it turn out that RTM transaction always aborted with 0 (a few times with 4 or 6 also, which I think maybe expected due to memory change of monitored addresses).
I found some explanation of the abort state here:
https://www.intel.com/content/www/us/en/develop/documentation/cpp-compiler-developer-guide-and-reference/top/compiler-reference/intrinsics/intrinsics-for-avx2/intrinsics-for-tsx/intrinsics-for-restrict-transactional-mem-ops/restricted-transactional-memory-overview.html
For abort code 0, it just say one example (CPUID used within transcation), but it seems CPUID is not used within rte_power_monitor_multi.
I also tried rte_power_pause and rte_power_monitor, both works as expected, CPU enters C0.2 state (checked by perf stat --e r20ec -C xx)

Now, I don't know why the RTM transaction aborted with 0 and don't know how to debug it.

Can anyone throw some light on this?

Thank you.

Br, Xiaoping


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                 reply	other threads:[~2023-02-27 13:52 UTC|newest]

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