From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6373BA04FD for ; Wed, 10 Jun 2020 09:45:57 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 205192BF1; Wed, 10 Jun 2020 09:45:57 +0200 (CEST) Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) by dpdk.org (Postfix) with ESMTP id C97452B86 for ; Wed, 10 Jun 2020 09:45:55 +0200 (CEST) Received: from compute7.internal (compute7.nyi.internal [10.202.2.47]) by mailout.nyi.internal (Postfix) with ESMTP id 574BA5C0100; Wed, 10 Jun 2020 03:45:55 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute7.internal (MEProxy); Wed, 10 Jun 2020 03:45:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= uhflcQgnUmmFMp7sOaincK0akO5wkB+d8S6HrsaYV5o=; b=x8KaHdoQ7FMDZ5IZ Qyec8LIWUBnyIw5Kz6/CQ0eABDGD/m6gQ7hIZSmeePzlwJk6a/up342Rhf/kAEhX y6Oa65GEBbWHVih4ra04Zp7yrXjAz/5yQkB4prWgSEVo18WC9uMe7ZRMu96sAB2V m2KV+SBD/2jK0DGXG4/flDRDQIAMXN+U+B85Myz6y2f293+YbXYFA0Ut8WMvP3WG f9YiOD5jsS4uWIhaCuyGojrYpFJ8MtYg7B4ke8r9MbZ1yXtTDwJBj5DNgxq9GykP OJ7Cjjbt2x4IS+4t+/9bfdz+zGleRQQXStcdKg5pBkxGDECMnjNi3DhgZ/OedaWC OpEkwg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=uhflcQgnUmmFMp7sOaincK0akO5wkB+d8S6HrsaYV 5o=; b=DvkkQWrC1WnoI+TOp2iqmXg6ygUBQgCgdABVcBVlHFdY7VlHvcuJfhn2S runmW9ePHhb7I8jG6PSF2MmizY5nNhzMckxLlFCGt7SoigR9+8yKUWbgYSW+fzwN qcEtVnZciUG7g/XiubUb+jNmG/z751m+QXgBjuWPW20lkonjPiL84ALvp+Nbkuf8 hki8Ei5/WcLIJSiNS4kyow+QW/SMLEJWi4tPcab7kCKxqHtYAcueA2k8AM4JqJ9p IHckOCvljFfOlJGdSZNWCJAd3EFdFJRO8/kUQbD/tyiM1IGvkpD94PgcIAhpOCC/ KXhq6OZe58oKqAdtYQrSNv2T4nE/w== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduhedrudehhedguddvgecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecunecujfgurhephffvufffkfgjfhgggfgtsehtuf ertddttddvnecuhfhrohhmpefvhhhomhgrshcuofhonhhjrghlohhnuceothhhohhmrghs sehmohhnjhgrlhhonhdrnhgvtheqnecuggftrfgrthhtvghrnhepffdvffejueetleefie eludduuefgteejleevfeekjeefieegheetffdvkeefgedunecuffhomhgrihhnpeguphgu khdrohhrghenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrhfuih iivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgrlhho nhdrnhgvth X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id A57B03280063; Wed, 10 Jun 2020 03:45:54 -0400 (EDT) From: Thomas Monjalon To: honnappa.nagarahalli@arm.com Cc: web@dpdk.org, nd@arm.com Date: Wed, 10 Jun 2020 09:45:53 +0200 Message-ID: <2172790.d8zb65QJnH@thomas> In-Reply-To: <20200610003830.5155-1-honnappa.nagarahalli@arm.com> References: <20200610003830.5155-1-honnappa.nagarahalli@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-web] [PATCH v2] update Arm roadmap for 20.08 X-BeenThere: web@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK website maintenance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: web-bounces@dpdk.org Sender: "web" 10/06/2020 02:38, Honnappa Nagarahalli: > Roadmap was announced in the dpdk-dev mailing list: > http://mails.dpdk.org/archives/dev/2020-June/169542.html > > Signed-off-by: Honnappa Nagarahalli > --- > +- Bit operations APIs for PMDs > +- Use C11 atomic semantics in mbuf, eventdev, eal interrupts > +- CPU frequency calculation using generic counter for Arm platforms > +- Integrate RCU library with LPM library > +- Change IO barriers to use 'DMB' instruction for Armv8-a Updated slightly to have Arm in front of the lines: +- bit operations API for drivers +- Arm CPU frequency calculation using generic counter +- Armv8-a IO barriers changed to use DMB instruction - Arm CRC32 in generic API +- C11 atomic semantics in mbuf, eventdev, EAL interrupts +- integrate RCU library with LPM library Applied, thanks