From: Maxime Coquelin <maxime.coquelin@redhat.com>
To: "Chautru, Nicolas" <nicolas.chautru@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>,
"thomas@monjalon.net" <thomas@monjalon.net>
Cc: "trix@redhat.com" <trix@redhat.com>,
"mdr@ashroe.eu" <mdr@ashroe.eu>,
"Richardson, Bruce" <bruce.richardson@intel.com>,
"hemant.agrawal@nxp.com" <hemant.agrawal@nxp.com>,
"david.marchand@redhat.com" <david.marchand@redhat.com>,
"stephen@networkplumber.org" <stephen@networkplumber.org>,
"Vargas, Hernan" <hernan.vargas@intel.com>
Subject: Re: [PATCH v4 13/14] baseband/acc: add PF configure companion function
Date: Tue, 27 Sep 2022 15:56:37 +0200 [thread overview]
Message-ID: <0643ebb8-44c6-06df-5bda-08e4142b1693@redhat.com> (raw)
In-Reply-To: <BY5PR11MB44510F260597D32CCAC279D0F8509@BY5PR11MB4451.namprd11.prod.outlook.com>
On 9/24/22 02:20, Chautru, Nicolas wrote:
> Hi Maxime,
> Thanks will send an updated serie now. Much appreciated.
>
>> -----Original Message-----
>> From: Maxime Coquelin <maxime.coquelin@redhat.com>
>> Sent: Friday, September 23, 2022 2:26 AM
>> To: Chautru, Nicolas <nicolas.chautru@intel.com>; dev@dpdk.org;
>> thomas@monjalon.net
>> Cc: trix@redhat.com; mdr@ashroe.eu; Richardson, Bruce
>> <bruce.richardson@intel.com>; hemant.agrawal@nxp.com;
>> david.marchand@redhat.com; stephen@networkplumber.org; Vargas,
>> Hernan <hernan.vargas@intel.com>
>> Subject: Re: [PATCH v4 13/14] baseband/acc: add PF configure companion
>> function
>>
>>
>>
>> On 9/22/22 02:27, Nic Chautru wrote:
>>> Add configure function notably to configure the device from the PF
>>> within DPDK and bbdev-test (without external dependency).
>>>
>>> Signed-off-by: Nic Chautru <nicolas.chautru@intel.com>
>>> ---
>>> app/test-bbdev/test_bbdev_perf.c | 71 ++++++
>>> drivers/baseband/acc/meson.build | 2 +-
>>> drivers/baseband/acc/rte_acc200_cfg.h | 48 ++++
>>> drivers/baseband/acc/rte_acc200_pmd.c | 453
>> ++++++++++++++++++++++++++++++++++
>>> drivers/baseband/acc/version.map | 1 +
>>> 5 files changed, 574 insertions(+), 1 deletion(-)
>>> create mode 100644 drivers/baseband/acc/rte_acc200_cfg.h
>>>
>>> diff --git a/app/test-bbdev/test_bbdev_perf.c
>>> b/app/test-bbdev/test_bbdev_perf.c
>>> index 41c78de..ec6ee2a 100644
>>> --- a/app/test-bbdev/test_bbdev_perf.c
>>> +++ b/app/test-bbdev/test_bbdev_perf.c
>>> @@ -62,6 +62,15 @@
>>> #define ACC100_QMGR_INVALID_IDX -1
>>> #define ACC100_QMGR_RR 1
>>> #define ACC100_QOS_GBR 0
>>> +#include <rte_acc200_cfg.h>
>>> +#define ACC200PF_DRIVER_NAME ("intel_acc200_pf")
>>> +#define ACC200VF_DRIVER_NAME ("intel_acc200_vf")
>>> +#define ACC200_QMGR_NUM_AQS 16
>>> +#define ACC200_QMGR_NUM_QGS 2
>>> +#define ACC200_QMGR_AQ_DEPTH 5
>>> +#define ACC200_QMGR_INVALID_IDX -1
>>> +#define ACC200_QMGR_RR 1
>>> +#define ACC200_QOS_GBR 0
>>> #endif
>>>
>>> #define OPS_CACHE_SIZE 256U
>>> @@ -761,6 +770,68 @@ typedef int (test_case_function)(struct
>> active_device *ad,
>>> "Failed to configure ACC100 PF for bbdev
>> %s",
>>> info->dev_name);
>>> }
>>> + if ((get_init_device() == true) &&
>>> + (!strcmp(info->drv.driver_name, ACC200PF_DRIVER_NAME)))
>> {
>>> + struct rte_acc_conf conf;
>>> + unsigned int i;
>>> +
>>> + printf("Configure ACC200 FEC Driver %s with default
>> values\n",
>>> + info->drv.driver_name);
>>> +
>>> + /* clear default configuration before initialization */
>>> + memset(&conf, 0, sizeof(struct rte_acc_conf));
>>> +
>>> + /* Always set in PF mode for built-in configuration */
>>> + conf.pf_mode_en = true;
>>> + for (i = 0; i < RTE_ACC_NUM_VFS; ++i) {
>>> + conf.arb_dl_4g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_dl_4g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_dl_4g[i].round_robin_weight =
>> ACC200_QMGR_RR;
>>> + conf.arb_ul_4g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_ul_4g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_ul_4g[i].round_robin_weight =
>> ACC200_QMGR_RR;
>>> + conf.arb_dl_5g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_dl_5g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_dl_5g[i].round_robin_weight =
>> ACC200_QMGR_RR;
>>> + conf.arb_ul_5g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_ul_5g[i].gbr_threshold1 =
>> ACC200_QOS_GBR;
>>> + conf.arb_ul_5g[i].round_robin_weight =
>> ACC200_QMGR_RR;
>>> + conf.arb_fft[i].gbr_threshold1 = ACC200_QOS_GBR;
>>> + conf.arb_fft[i].gbr_threshold1 = ACC200_QOS_GBR;
>>> + conf.arb_fft[i].round_robin_weight =
>> ACC200_QMGR_RR;
>>> + }
>>> +
>>> + conf.input_pos_llr_1_bit = true;
>>> + conf.output_pos_llr_1_bit = true;
>>> + conf.num_vf_bundles = 1; /**< Number of VF bundles to
>> setup */
>>> +
>>> + conf.q_ul_4g.num_qgroups = ACC200_QMGR_NUM_QGS;
>>> + conf.q_ul_4g.first_qgroup_index =
>> ACC200_QMGR_INVALID_IDX;
>>> + conf.q_ul_4g.num_aqs_per_groups =
>> ACC200_QMGR_NUM_AQS;
>>> + conf.q_ul_4g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
>>> + conf.q_dl_4g.num_qgroups = ACC200_QMGR_NUM_QGS;
>>> + conf.q_dl_4g.first_qgroup_index =
>> ACC200_QMGR_INVALID_IDX;
>>> + conf.q_dl_4g.num_aqs_per_groups =
>> ACC200_QMGR_NUM_AQS;
>>> + conf.q_dl_4g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
>>> + conf.q_ul_5g.num_qgroups = ACC200_QMGR_NUM_QGS;
>>> + conf.q_ul_5g.first_qgroup_index =
>> ACC200_QMGR_INVALID_IDX;
>>> + conf.q_ul_5g.num_aqs_per_groups =
>> ACC200_QMGR_NUM_AQS;
>>> + conf.q_ul_5g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
>>> + conf.q_dl_5g.num_qgroups = ACC200_QMGR_NUM_QGS;
>>> + conf.q_dl_5g.first_qgroup_index =
>> ACC200_QMGR_INVALID_IDX;
>>> + conf.q_dl_5g.num_aqs_per_groups =
>> ACC200_QMGR_NUM_AQS;
>>> + conf.q_dl_5g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
>>> + conf.q_fft.num_qgroups = ACC200_QMGR_NUM_QGS;
>>> + conf.q_fft.first_qgroup_index =
>> ACC200_QMGR_INVALID_IDX;
>>> + conf.q_fft.num_aqs_per_groups =
>> ACC200_QMGR_NUM_AQS;
>>> + conf.q_fft.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH;
>>> +
>>> + /* setup PF with configuration information */
>>> + ret = rte_acc200_configure(info->dev_name, &conf);
>>> + TEST_ASSERT_SUCCESS(ret,
>>> + "Failed to configure ACC200 PF for bbdev
>> %s",
>>> + info->dev_name);
>>> + }
>>> #endif
>>> /* Let's refresh this now this is configured */
>>> rte_bbdev_info_get(dev_id, info);
>>> diff --git a/drivers/baseband/acc/meson.build
>>> b/drivers/baseband/acc/meson.build
>>> index 63912f0..7ae162a 100644
>>> --- a/drivers/baseband/acc/meson.build
>>> +++ b/drivers/baseband/acc/meson.build
>>> @@ -5,4 +5,4 @@ deps += ['bbdev', 'bus_vdev', 'ring', 'pci',
>>> 'bus_pci']
>>>
>>> sources = files('rte_acc100_pmd.c', 'rte_acc200_pmd.c')
>>>
>>> -headers = files('rte_acc100_cfg.h')
>>> +headers = files('rte_acc100_cfg.h', 'rte_acc200_cfg.h')
>>> diff --git a/drivers/baseband/acc/rte_acc200_cfg.h
>>> b/drivers/baseband/acc/rte_acc200_cfg.h
>>> new file mode 100644
>>> index 0000000..8bd9b20
>>> --- /dev/null
>>> +++ b/drivers/baseband/acc/rte_acc200_cfg.h
>>> @@ -0,0 +1,48 @@
>>> +/* SPDX-License-Identifier: BSD-3-Clause
>>> + * Copyright(c) 2022 Intel Corporation */
>>> +
>>> +#ifndef _RTE_ACC200_CFG_H_
>>> +#define _RTE_ACC200_CFG_H_
>>> +
>>> +/**
>>> + * @file rte_acc200_cfg.h
>>> + *
>>> + * Functions for configuring ACC200 HW, exposed directly to applications.
>>> + * Configuration related to encoding/decoding is done through the
>>> + * librte_bbdev library.
>>> + *
>>> + * @warning
>>> + * @b EXPERIMENTAL: this API may change without prior notice */
>>> +
>>> +#include <stdint.h>
>>> +#include <stdbool.h>
>>> +#include "rte_acc_common_cfg.h"
>>> +
>>> +#ifdef __cplusplus
>>> +extern "C" {
>>> +#endif
>>> +
>>> +/**
>>> + * Configure a ACC200 device
>>> + *
>>> + * @param dev_name
>>> + * The name of the device. This is the short form of PCI BDF, e.g. 00:01.0.
>>> + * It can also be retrieved for a bbdev device from the dev_name field in
>> the
>>> + * rte_bbdev_info structure returned by rte_bbdev_info_get().
>>> + * @param conf
>>> + * Configuration to apply to ACC200 HW.
>>> + *
>>> + * @return
>>> + * Zero on success, negative value on failure.
>>> + */
>>> +__rte_experimental
>>> +int
>>> +rte_acc200_configure(const char *dev_name, struct rte_acc_conf
>>> +*conf);
>>> +
>>> +#ifdef __cplusplus
>>> +}
>>> +#endif
>>> +
>>> +#endif /* _RTE_ACC200_CFG_H_ */
>>> diff --git a/drivers/baseband/acc/rte_acc200_pmd.c
>>> b/drivers/baseband/acc/rte_acc200_pmd.c
>>> index 3c2931b..21d614d 100644
>>> --- a/drivers/baseband/acc/rte_acc200_pmd.c
>>> +++ b/drivers/baseband/acc/rte_acc200_pmd.c
>>> @@ -43,6 +43,27 @@
>>>
>>> enum {UL_4G = 0, UL_5G, DL_4G, DL_5G, FFT, NUM_ACC};
>>>
>>> +/* Return the accelerator enum for a Queue Group Index */ static
>>> +inline int accFromQgid(int qg_idx, const struct rte_acc_conf
>>> +*acc_conf) {
>>> + int accQg[ACC200_NUM_QGRPS];
>>> + int NumQGroupsPerFn[NUM_ACC];
>>> + int acc, qgIdx, qgIndex = 0;
>>> + for (qgIdx = 0; qgIdx < ACC200_NUM_QGRPS; qgIdx++)
>>> + accQg[qgIdx] = 0;
>>> + NumQGroupsPerFn[UL_4G] = acc_conf->q_ul_4g.num_qgroups;
>>> + NumQGroupsPerFn[UL_5G] = acc_conf->q_ul_5g.num_qgroups;
>>> + NumQGroupsPerFn[DL_4G] = acc_conf->q_dl_4g.num_qgroups;
>>> + NumQGroupsPerFn[DL_5G] = acc_conf->q_dl_5g.num_qgroups;
>>> + NumQGroupsPerFn[FFT] = acc_conf->q_fft.num_qgroups;
>>> + for (acc = UL_4G; acc < NUM_ACC; acc++)
>>> + for (qgIdx = 0; qgIdx < NumQGroupsPerFn[acc]; qgIdx++)
>>> + accQg[qgIndex++] = acc;
>>> + acc = accQg[qg_idx];
>>> + return acc;
>>> +}
>>> +
>>> /* Return the queue topology for a Queue Group Index */
>>> static inline void
>>> qtopFromAcc(struct rte_acc_queue_topology **qtop, int acc_enum, @@
>>> -75,6 +96,30 @@
>>> *qtop = p_qtop;
>>> }
>>>
>>> +/* Return the AQ depth for a Queue Group Index */ static inline int
>>> +aqDepth(int qg_idx, struct rte_acc_conf *acc_conf) {
>>> + struct rte_acc_queue_topology *q_top = NULL;
>>> + int acc_enum = accFromQgid(qg_idx, acc_conf);
>>> + qtopFromAcc(&q_top, acc_enum, acc_conf);
>>> + if (unlikely(q_top == NULL))
>>> + return 0;
>>> + return q_top->aq_depth_log2;
>>> +}
>>> +
>>> +/* Return the AQ depth for a Queue Group Index */ static inline int
>>> +aqNum(int qg_idx, struct rte_acc_conf *acc_conf) {
>>> + struct rte_acc_queue_topology *q_top = NULL;
>>> + int acc_enum = accFromQgid(qg_idx, acc_conf);
>>> + qtopFromAcc(&q_top, acc_enum, acc_conf);
>>> + if (unlikely(q_top == NULL))
>>> + return 0;
>>> + return q_top->num_aqs_per_groups;
>>> +}
>>
>>
>> For the 3 functions above, please add new lines for clarity.
>
> OK, guidelines would be good, as I am not fully convinced. But updating in new series.
>
I have not checked whether it is in the contribution guidelines, but
having new lines between the variables declarations and code is
a common rules that makes the code more readable. So is having new lines
before the returns.
next prev parent reply other threads:[~2022-09-27 13:56 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 0:27 From: Nic Chautru <nicolas.chautru@intel.com> Nic Chautru
2022-09-22 0:27 ` [PATCH v4 01/14] baseband/acc100: remove unused registers Nic Chautru
2022-09-22 0:37 ` Chautru, Nicolas
2022-09-22 13:08 ` Maxime Coquelin
2022-09-22 13:09 ` Maxime Coquelin
2022-09-22 0:27 ` [PATCH v4 02/14] baseband/acc100: refactor to segregate common code Nic Chautru
2022-09-22 13:15 ` Maxime Coquelin
2022-09-22 0:27 ` [PATCH v4 03/14] baseband/acc: rename directory from acc100 to acc Nic Chautru
2022-09-22 13:17 ` Maxime Coquelin
2022-09-22 18:06 ` Chautru, Nicolas
2022-09-22 0:27 ` [PATCH v4 04/14] baseband/acc: introduce PMD for ACC200 Nic Chautru
2022-09-22 14:01 ` Maxime Coquelin
2022-09-22 0:27 ` [PATCH v4 05/14] baseband/acc: add HW register definitions " Nic Chautru
2022-09-22 14:04 ` Maxime Coquelin
2022-09-22 0:27 ` [PATCH v4 06/14] baseband/acc: add info get function " Nic Chautru
2022-09-22 14:11 ` Maxime Coquelin
2022-09-22 18:20 ` Chautru, Nicolas
2022-09-22 0:27 ` [PATCH v4 07/14] baseband/acc: add queue configuration " Nic Chautru
2022-09-22 14:30 ` Maxime Coquelin
2022-09-22 18:51 ` Chautru, Nicolas
2022-09-22 0:27 ` [PATCH v4 08/14] baseband/acc: add LDPC processing functions Nic Chautru
2022-09-23 8:29 ` Maxime Coquelin
2022-09-23 21:55 ` Chautru, Nicolas
2022-09-27 13:12 ` Maxime Coquelin
2022-09-22 0:27 ` [PATCH v4 09/14] baseband/acc: add LTE " Nic Chautru
2022-09-23 8:59 ` Maxime Coquelin
2022-09-23 22:21 ` Chautru, Nicolas
2022-09-27 13:33 ` Maxime Coquelin
2022-09-22 0:27 ` [PATCH v4 10/14] baseband/acc: add support for FFT operations Nic Chautru
2022-09-23 9:05 ` Maxime Coquelin
2022-09-23 22:31 ` Chautru, Nicolas
2022-09-22 0:27 ` [PATCH v4 11/14] baseband/acc: support interrupt Nic Chautru
2022-09-23 9:17 ` Maxime Coquelin
2022-09-23 22:58 ` Chautru, Nicolas
2022-09-22 0:27 ` [PATCH v4 12/14] baseband/acc: add device status and vf2pf comms Nic Chautru
2022-09-23 9:23 ` Maxime Coquelin
2022-09-24 0:04 ` Chautru, Nicolas
2022-09-22 0:27 ` [PATCH v4 13/14] baseband/acc: add PF configure companion function Nic Chautru
2022-09-23 9:26 ` Maxime Coquelin
2022-09-24 0:20 ` Chautru, Nicolas
2022-09-27 13:56 ` Maxime Coquelin [this message]
2022-09-22 0:27 ` [PATCH v4 14/14] baseband/acc: simplify meson dependency Nic Chautru
2022-09-23 11:41 ` From: Nic Chautru <nicolas.chautru@intel.com> Maxime Coquelin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0643ebb8-44c6-06df-5bda-08e4142b1693@redhat.com \
--to=maxime.coquelin@redhat.com \
--cc=bruce.richardson@intel.com \
--cc=david.marchand@redhat.com \
--cc=dev@dpdk.org \
--cc=hemant.agrawal@nxp.com \
--cc=hernan.vargas@intel.com \
--cc=mdr@ashroe.eu \
--cc=nicolas.chautru@intel.com \
--cc=stephen@networkplumber.org \
--cc=thomas@monjalon.net \
--cc=trix@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).