From: Ouyang Changchun <changchun.ouyang@intel.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH v2 06/18] ixgbe: New argument in host interface command function
Date: Mon, 29 Sep 2014 15:16:14 +0800 [thread overview]
Message-ID: <1411974986-28137-7-git-send-email-changchun.ouyang@intel.com> (raw)
In-Reply-To: <1411974986-28137-1-git-send-email-changchun.ouyang@intel.com>
This patch introduces a new argument to let caller determine if it need read and
return data or not after executing host interface command in IXGBE base code.
Signed-off-by: Changchun Ouyang <changchun.ouyang@intel.com>
---
lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c | 66 ++++++++++++++++++-------------
lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h | 3 +-
2 files changed, 40 insertions(+), 29 deletions(-)
diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c
index 4bd004c..f8f4e7e 100644
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c
@@ -4341,41 +4341,50 @@ u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)
* @buffer: contains the command to write and where the return status will
* be placed
* @length: length of buffer, must be multiple of 4 bytes
+ * @return_data: read and return data from the buffer (true) or not (false)
+ * Needed because FW structures are big endian and decoding of
+ * these fields can be 8 bit or 16 bit based on command. Decoding
+ * is not easily understood without making a table of commands.
+ * So we will leave this up to the caller to read back the data
+ * in these cases.
*
* Communicates with the manageability block. On success return IXGBE_SUCCESS
* else return IXGBE_ERR_HOST_INTERFACE_COMMAND.
**/
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
- u32 length)
+ u32 length, bool return_data)
{
- u32 hicr, i, bi;
+ u32 hicr, i, bi, fwsts;
u32 hdr_size = sizeof(struct ixgbe_hic_hdr);
- u8 buf_len, dword_len;
-
- s32 ret_val = IXGBE_SUCCESS;
+ u16 buf_len;
+ u8 dword_len;
DEBUGFUNC("ixgbe_host_interface_command");
- if (length == 0 || length & 0x3 ||
- length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) {
- DEBUGOUT("Buffer length failure.\n");
- ret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;
- goto out;
+ if (length == 0 || length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) {
+ DEBUGOUT1("Buffer length failure buffersize=%d.\n", length);
+ return IXGBE_ERR_HOST_INTERFACE_COMMAND;
}
+ /* Set bit 9 of FWSTS clearing FW reset indication */
+ fwsts = IXGBE_READ_REG(hw, IXGBE_FWSTS);
+ IXGBE_WRITE_REG(hw, IXGBE_FWSTS, fwsts | IXGBE_FWSTS_FWRI);
/* Check that the host interface is enabled. */
hicr = IXGBE_READ_REG(hw, IXGBE_HICR);
if ((hicr & IXGBE_HICR_EN) == 0) {
DEBUGOUT("IXGBE_HOST_EN bit disabled.\n");
- ret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;
- goto out;
+ return IXGBE_ERR_HOST_INTERFACE_COMMAND;
+ }
+
+ /* Calculate length in DWORDs. We must be DWORD aligned */
+ if ((length % (sizeof(u32))) != 0) {
+ DEBUGOUT("Buffer length failure, not aligned to dword");
+ return IXGBE_ERR_INVALID_ARGUMENT;
}
- /* Calculate length in DWORDs */
dword_len = length >> 2;
- /*
- * The device driver writes the relevant command block
+ /* The device driver writes the relevant command block
* into the ram area.
*/
for (i = 0; i < dword_len; i++)
@@ -4392,14 +4401,17 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
msec_delay(1);
}
- /* Check command successful completion. */
+ /* Check command completion */
if (i == IXGBE_HI_COMMAND_TIMEOUT ||
- (!(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV))) {
- DEBUGOUT("Command has failed with no status valid.\n");
- ret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;
- goto out;
+ !(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV)) {
+ ERROR_REPORT1(IXGBE_ERROR_CAUTION,
+ "Command has failed with no status valid.\n");
+ return IXGBE_ERR_HOST_INTERFACE_COMMAND;
}
+ if (!return_data)
+ return 0;
+
/* Calculate length in DWORDs */
dword_len = hdr_size >> 2;
@@ -4412,25 +4424,23 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
/* If there is any thing in data position pull it in */
buf_len = ((struct ixgbe_hic_hdr *)buffer)->buf_len;
if (buf_len == 0)
- goto out;
+ return 0;
- if (length < (buf_len + hdr_size)) {
+ if (length < buf_len + hdr_size) {
DEBUGOUT("Buffer not large enough for reply message.\n");
- ret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;
- goto out;
+ return IXGBE_ERR_HOST_INTERFACE_COMMAND;
}
/* Calculate length in DWORDs, add 3 for odd lengths */
dword_len = (buf_len + 3) >> 2;
- /* Pull in the rest of the buffer (bi is where we left off)*/
+ /* Pull in the rest of the buffer (bi is where we left off) */
for (; bi <= dword_len; bi++) {
buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);
IXGBE_LE32_TO_CPUS(&buffer[bi]);
}
-out:
- return ret_val;
+ return 0;
}
/**
@@ -4477,7 +4487,7 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
- sizeof(fw_cmd));
+ sizeof(fw_cmd), true);
if (ret_val != IXGBE_SUCCESS)
continue;
diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h
index 03e71c0..8b8bd0b 100644
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h
@@ -157,7 +157,8 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
u8 build, u8 ver);
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
- u32 length);
+ u32 length, bool return_data);
+
void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
--
1.8.4.2
next prev parent reply other threads:[~2014-09-29 7:10 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1411974986-28137-1-git-send-email-changchun.ouyang@intel.com>
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 01/18] ixgbe: Update comments and fix some comments typo in IXGBE base code Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 02/18] ixgbe: Clean up IXGBE base codes Ouyang Changchun
2014-09-29 14:55 ` Neil Horman
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 03/18] ixgbe: New function to check command complete in IXGBE base code Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 04/18] ixgbe: Support cloud mode " Ouyang Changchun
2014-09-29 17:01 ` Neil Horman
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 05/18] ixgbe: eeprom checksum calculation return new value " Ouyang Changchun
2014-09-29 7:16 ` Ouyang Changchun [this message]
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 07/18] ixgbe: Extend mask for SWFW semaphore Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 08/18] ixgbe: New function to read and write I2C bytes Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 09/18] ixgbe: Support new device id 82599_QSFP and 82599_LS Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 10/18] ixgbe: Modify time to wait in polling flash update Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 11/18] ixgbe: New error type Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 12/18] ixgbe: Use hardware MAC type for I2C control Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 13/18] ixgbe: semaphore mask move into hardware physical information Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 14/18] ixgbe: Remove unnecessary delay Ouyang Changchun
2014-09-30 12:58 ` Neil Horman
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 15/18] ixgbe: New function for resetting VF register Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 16/18] ixgbe: New functionalities in IXGBE base code Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 17/18] ixgbe: Support X550 " Ouyang Changchun
2014-09-29 7:16 ` [dpdk-dev] [PATCH v2 18/18] ixgbe: Support X550 in IXGBE poll mode driver Ouyang Changchun
2014-10-07 15:14 ` [dpdk-dev] [PATCH v2 00/18] Update IXGBE base code Thomas Monjalon
2014-10-07 16:57 ` Neil Horman
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