From: Zhigang Lu <zlu@ezchip.com>
To: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH v3 08/12] mempool: allow config override on element alignment
Date: Mon, 6 Jul 2015 16:51:33 +0800 [thread overview]
Message-ID: <1436172698-21749-9-git-send-email-zlu@ezchip.com> (raw)
In-Reply-To: <1436172698-21749-1-git-send-email-zlu@ezchip.com>
On TILE-Gx and TILE-Mx platforms, the buffers fed into the hardware
buffer manager require a 128-byte alignment. With this change, we
allow configuration based override of the element alignment, and
default to RTE_CACHE_LINE_SIZE if left unspecified.
Change-Id: I9cd789d92b0bc9c8f44a633de59bb04d45d927a7
Signed-off-by: Zhigang Lu <zlu@ezchip.com>
---
lib/librte_mempool/rte_mempool.c | 16 +++++++++-------
lib/librte_mempool/rte_mempool.h | 6 ++++++
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 02699a1..8e185c5 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -120,10 +120,10 @@ static unsigned optimize_object_size(unsigned obj_size)
nrank = 1;
/* process new object size */
- new_obj_size = (obj_size + RTE_CACHE_LINE_MASK) / RTE_CACHE_LINE_SIZE;
+ new_obj_size = (obj_size + RTE_MEMPOOL_ALIGN_MASK) / RTE_MEMPOOL_ALIGN;
while (get_gcd(new_obj_size, nrank * nchan) != 1)
new_obj_size++;
- return new_obj_size * RTE_CACHE_LINE_SIZE;
+ return new_obj_size * RTE_MEMPOOL_ALIGN;
}
static void
@@ -267,7 +267,7 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
#endif
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0)
sz->header_size = RTE_ALIGN_CEIL(sz->header_size,
- RTE_CACHE_LINE_SIZE);
+ RTE_MEMPOOL_ALIGN);
/* trailer contains the cookie in debug mode */
sz->trailer_size = 0;
@@ -281,9 +281,9 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0) {
sz->total_size = sz->header_size + sz->elt_size +
sz->trailer_size;
- sz->trailer_size += ((RTE_CACHE_LINE_SIZE -
- (sz->total_size & RTE_CACHE_LINE_MASK)) &
- RTE_CACHE_LINE_MASK);
+ sz->trailer_size += ((RTE_MEMPOOL_ALIGN -
+ (sz->total_size & RTE_MEMPOOL_ALIGN_MASK)) &
+ RTE_MEMPOOL_ALIGN_MASK);
}
/*
@@ -498,7 +498,7 @@ rte_mempool_xmem_create(const char *name, unsigned n, unsigned elt_size,
* cache-aligned
*/
private_data_size = (private_data_size +
- RTE_CACHE_LINE_MASK) & (~RTE_CACHE_LINE_MASK);
+ RTE_MEMPOOL_ALIGN_MASK) & (~RTE_MEMPOOL_ALIGN_MASK);
if (! rte_eal_has_hugepages()) {
/*
@@ -525,6 +525,7 @@ rte_mempool_xmem_create(const char *name, unsigned n, unsigned elt_size,
* enough to hold mempool header and metadata plus mempool objects.
*/
mempool_size = MEMPOOL_HEADER_SIZE(mp, pg_num) + private_data_size;
+ mempool_size = RTE_ALIGN_CEIL(mempool_size, RTE_MEMPOOL_ALIGN);
if (vaddr == NULL)
mempool_size += (size_t)objsz.total_size * n;
@@ -580,6 +581,7 @@ rte_mempool_xmem_create(const char *name, unsigned n, unsigned elt_size,
/* calculate address of the first element for continuous mempool. */
obj = (char *)mp + MEMPOOL_HEADER_SIZE(mp, pg_num) +
private_data_size;
+ obj = RTE_PTR_ALIGN_CEIL(obj, RTE_MEMPOOL_ALIGN);
/* populate address translation fields. */
mp->pg_num = pg_num;
diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
index 6d4ce9a..ee67ce7 100644
--- a/lib/librte_mempool/rte_mempool.h
+++ b/lib/librte_mempool/rte_mempool.h
@@ -142,6 +142,12 @@ struct rte_mempool_objsz {
/** Mempool over one chunk of physically continuous memory */
#define MEMPOOL_PG_NUM_DEFAULT 1
+#ifndef RTE_MEMPOOL_ALIGN
+#define RTE_MEMPOOL_ALIGN RTE_CACHE_LINE_SIZE
+#endif
+
+#define RTE_MEMPOOL_ALIGN_MASK (RTE_MEMPOOL_ALIGN - 1)
+
/**
* Mempool object header structure
*
--
2.1.2
next prev parent reply other threads:[~2015-07-06 8:53 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-06 8:51 [dpdk-dev] [PATCH v3 00/12] Introducing the TILE-Gx platform Zhigang Lu
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 01/12] test: limit x86 cpuflags checks to x86 builds Zhigang Lu
2015-07-06 10:53 ` Bruce Richardson
2015-07-07 8:21 ` Tony Lu
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 02/12] hash: fix compilation on non-X86 platforms Zhigang Lu
2015-07-06 11:15 ` Bruce Richardson
2015-07-07 8:24 ` Tony Lu
2015-07-07 14:52 ` Sanford, Robert
2015-07-08 8:21 ` Tony Lu
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 03/12] hash: check SSE flags only on x86 builds Zhigang Lu
2015-07-06 15:32 ` Bruce Richardson
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 04/12] eal: allow empty compile time flags Zhigang Lu
2015-07-06 15:33 ` Bruce Richardson
2015-07-09 0:46 ` Thomas Monjalon
2015-07-09 4:20 ` Tony Lu
2015-07-09 6:49 ` damu
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 05/12] config: remove RTE_LIBNAME definition Zhigang Lu
2015-07-06 15:34 ` Bruce Richardson
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 06/12] memzone: refactor rte_memzone_reserve() variants Zhigang Lu
2015-07-09 0:51 ` Thomas Monjalon
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 07/12] memzone: allow multiple pagesizes to be requested Zhigang Lu
2015-07-06 8:51 ` Zhigang Lu [this message]
2015-07-06 15:37 ` [dpdk-dev] [PATCH v3 08/12] mempool: allow config override on element alignment Bruce Richardson
2015-07-07 9:15 ` Tony Lu
2015-07-07 10:10 ` Bruce Richardson
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 09/12] tile: add page sizes for TILE-Gx/Mx platforms Zhigang Lu
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 10/12] tile: initial TILE-Gx support Zhigang Lu
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 11/12] tile: Add TILE-Gx mPIPE poll mode driver Zhigang Lu
2015-07-06 8:51 ` [dpdk-dev] [PATCH v3 12/12] maintainers: claim responsibility for TILE-Gx platform Zhigang Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1436172698-21749-9-git-send-email-zlu@ezchip.com \
--to=zlu@ezchip.com \
--cc=dev@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).