From: Jingjing Wu <jingjing.wu@intel.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH 24/52] i40e/base: Wrap the register definitions for PF and VF driver
Date: Sun, 6 Sep 2015 15:11:38 +0800 [thread overview]
Message-ID: <1441523526-26202-25-git-send-email-jingjing.wu@intel.com> (raw)
In-Reply-To: <1441523526-26202-1-git-send-email-jingjing.wu@intel.com>
There were quite a few issues when the wrong defines were getting used
in the VF driver. This patch defines a new #define PF_DRIVER.
All the PF specific register definitions are wrapped in it.
The drivers will have to be updated to use the define in the PF
driver builds. Makes for a very short register.h for VF drivers.
Also fixes the code where PF driver register fields were getting used for
VF driver.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_adminq.c | 56 +++++++++++++++++++++++++++++++++--
drivers/net/i40e/base/i40e_common.c | 24 +++++++++++++--
drivers/net/i40e/base/i40e_register.h | 4 +++
3 files changed, 78 insertions(+), 6 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c
index b2a96fa..4ffb788 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -69,6 +69,7 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
hw->aq.arq.len = I40E_VF_ARQLEN1;
hw->aq.arq.bal = I40E_VF_ARQBAL1;
hw->aq.arq.bah = I40E_VF_ARQBAH1;
+#ifdef PF_DRIVER
} else {
hw->aq.asq.tail = I40E_PF_ATQT;
hw->aq.asq.head = I40E_PF_ATQH;
@@ -80,6 +81,7 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
hw->aq.arq.len = I40E_PF_ARQLEN;
hw->aq.arq.bal = I40E_PF_ARQBAL;
hw->aq.arq.bah = I40E_PF_ARQBAH;
+#endif
}
}
@@ -316,8 +318,26 @@ STATIC enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw)
wr32(hw, hw->aq.asq.tail, 0);
/* set starting point */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+ if (!i40e_is_vf(hw))
+ wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+ I40E_PF_ATQLEN_ATQENABLE_MASK));
+#else
wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
I40E_PF_ATQLEN_ATQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+ if (i40e_is_vf(hw))
+ wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+ I40E_VF_ATQLEN1_ATQENABLE_MASK));
+#else
+ wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+ I40E_VF_ATQLEN1_ATQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
@@ -345,8 +365,26 @@ STATIC enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw)
wr32(hw, hw->aq.arq.tail, 0);
/* set starting point */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+ if (!i40e_is_vf(hw))
+ wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+ I40E_PF_ARQLEN_ARQENABLE_MASK));
+#else
wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
I40E_PF_ARQLEN_ARQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+ if (i40e_is_vf(hw))
+ wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+ I40E_VF_ARQLEN1_ARQENABLE_MASK));
+#else
+ wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+ I40E_VF_ARQLEN1_ARQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));
wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));
@@ -998,7 +1036,22 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
i40e_acquire_spinlock(&hw->aq.arq_spinlock);
/* set next_to_use to head */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+ if (!i40e_is_vf(hw))
+ ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
+#else
ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+ if (i40e_is_vf(hw))
+ ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK);
+#else
+ ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
if (ntu == ntc) {
/* nothing to do - shouldn't need to update ring's values */
ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;
@@ -1093,9 +1146,6 @@ void i40e_resume_aq(struct i40e_hw *hw)
hw->aq.asq.next_to_use = 0;
hw->aq.asq.next_to_clean = 0;
-#if (I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK)
-#error I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK
-#endif
i40e_config_asq_regs(hw);
hw->aq.arq.next_to_use = 0;
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index fccbdcb..df30f64 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -371,9 +371,27 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
bool i40e_check_asq_alive(struct i40e_hw *hw)
{
if (hw->aq.asq.len)
- return !!(rd32(hw, hw->aq.asq.len) & I40E_PF_ATQLEN_ATQENABLE_MASK);
- else
- return false;
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+ if (!i40e_is_vf(hw))
+ return !!(rd32(hw, hw->aq.asq.len) &
+ I40E_PF_ATQLEN_ATQENABLE_MASK);
+#else
+ return !!(rd32(hw, hw->aq.asq.len) &
+ I40E_PF_ATQLEN_ATQENABLE_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+ if (i40e_is_vf(hw))
+ return !!(rd32(hw, hw->aq.asq.len) &
+ I40E_VF_ATQLEN1_ATQENABLE_MASK);
+#else
+ return !!(rd32(hw, hw->aq.asq.len) &
+ I40E_VF_ATQLEN1_ATQENABLE_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
+ return false;
}
/**
diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index c8a8d77..4cc2b90 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -35,6 +35,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define _I40E_REGISTER_H_
+#ifdef PF_DRIVER
#define I40E_GL_ARQBAH 0x000801C0 /* Reset: EMPR */
#define I40E_GL_ARQBAH_ARQBAH_SHIFT 0
#define I40E_GL_ARQBAH_ARQBAH_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_ARQBAH_ARQBAH_SHIFT)
@@ -1609,6 +1610,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_MSIX_TVCTRL_MAX_INDEX 128
#define I40E_MSIX_TVCTRL_MASK_SHIFT 0
#define I40E_MSIX_TVCTRL_MASK_MASK I40E_MASK(0x1, I40E_MSIX_TVCTRL_MASK_SHIFT)
+#endif /* PF_DRIVER */
#define I40E_VFMSIX_PBA1(_i) (0x00002000 + ((_i) * 4)) /* _i=0...19 */ /* Reset: VFLR */
#define I40E_VFMSIX_PBA1_MAX_INDEX 19
#define I40E_VFMSIX_PBA1_PENBIT_SHIFT 0
@@ -1631,6 +1633,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_VFMSIX_TVCTRL1_MAX_INDEX 639
#define I40E_VFMSIX_TVCTRL1_MASK_SHIFT 0
#define I40E_VFMSIX_TVCTRL1_MASK_MASK I40E_MASK(0x1, I40E_VFMSIX_TVCTRL1_MASK_SHIFT)
+#ifdef PF_DRIVER
#define I40E_GLNVM_FLA 0x000B6108 /* Reset: POR */
#define I40E_GLNVM_FLA_FL_SCK_SHIFT 0
#define I40E_GLNVM_FLA_FL_SCK_MASK I40E_MASK(0x1, I40E_GLNVM_FLA_FL_SCK_SHIFT)
@@ -3150,6 +3153,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_PRTPM_SAL_MAX_INDEX 3
#define I40E_PRTPM_SAL_PFPM_SAL_SHIFT 0
#define I40E_PRTPM_SAL_PFPM_SAL_MASK I40E_MASK(0xFFFFFFFF, I40E_PRTPM_SAL_PFPM_SAL_SHIFT)
+#endif /* PF_DRIVER */
#define I40E_VF_ARQBAH1 0x00006000 /* Reset: EMPR */
#define I40E_VF_ARQBAH1_ARQBAH_SHIFT 0
#define I40E_VF_ARQBAH1_ARQBAH_MASK I40E_MASK(0xFFFFFFFF, I40E_VF_ARQBAH1_ARQBAH_SHIFT)
--
2.4.0
next prev parent reply other threads:[~2015-09-06 7:13 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-06 7:11 [dpdk-dev] [PATCH 00/52] update i40e base driver Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 01/52] i40e/base: split device ids into a separate file Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 02/52] i40e/base: Add new device id for 20Gb and Fort pond device Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 03/52] i40e/base: add error status value decoding Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 04/52] i40e/base: Replace sprintf with i40e_debug Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 05/52] i40e/base: Merge Fortville SW 4 admin Q command header Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 06/52] i40e/base: Add module_types and update_link_info Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 07/52] i40e/base: grab the AQ spinlocks before clearing registers Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 08/52] i40e/base: add handling of writeback descriptor Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 09/52] i40e/base: Add info to nvm info struct for OEM version data Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 10/52] i40e/base: add wait states to NVM state machine Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 11/52] i40e/base: add commands to nvmupdate utility Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 12/52] i40e/base: Add promiscuous on VLAN support Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 13/52] i40e/base: Add a workaround to drop all flow control frames Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 14/52] i40e/base: Add Debug Dump Internal Data AQ command Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 15/52] i40e/base: OEM Post Update AQ command implementation Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 16/52] i40e/base: add VF capabilities to virtual channel interface Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 17/52] i40e/base: create new BIT and BIT_ULL macros Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 18/52] i40e/base: Add parsing for CEE DCBX TLVs Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 19/52] i40e/base: Prepare the local LLDP MIB in IEEE TLV Format Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 20/52] i40e/base: Refactor PHY structure and add phy_capabilities enum Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 21/52] i40e/base: Store CEE DCBX cfg from firmware and Cache the CEE TLV status Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 22/52] i40e/base: Add some more stats for FD SB and ATR status Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 23/52] i40e/base: Update Flex-10 related device/function capabilities Jingjing Wu
2015-09-06 7:11 ` Jingjing Wu [this message]
2015-09-06 7:11 ` [dpdk-dev] [PATCH 25/52] i40e/base: fix up type clash in i40e_aq_rc_to_posix conversion Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 26/52] i40e/base: Add new link status defines Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 27/52] i40e/base: fixup padding issue in get_cee_dcb_cfg_v1_resp Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 28/52] i40e/base: Add Tx Scheduling related AQ commands Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 29/52] i40e/base: Additional checks for CEE APP priority validity Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 30/52] i40e/base: Add support for pre-allocated pages for pd Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 31/52] i40e/base: clean up unneeded gotos Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 32/52] i40e/base: Handle admin Q timeout when releasing NVM Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 33/52] i40e/base: Add definition of GLINT_CTL register Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 34/52] i40e/base: Add virtchnl op for additional solaris config Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 35/52] i40e/base: drop func from debug print Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 36/52] i40e/base: add new X722 device Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 37/52] i40e/base: Add AQ functions to handle RSS Key and LUT programming Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 38/52] i40e/base: add proxy config admin q functions Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 39/52] i40e/base: add wol config admin queue functions Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 40/52] i40e/base: add WR_CSR_PROT wol/proxy capability parsing Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 41/52] i40e/base: FortPark has additional PCTYPES supported for RSS Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 42/52] i40e/base: FortPark changes to Rx and Tx descriptor for Outer UDP checksum offloads Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 43/52] i40e/base: use INLINE macro for better cross-platform code management Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 44/52] i40e/base: ESS Support Jingjing Wu
2015-09-06 7:11 ` [dpdk-dev] [PATCH 45/52] i40e/base: print FCoE capability reported by the device function Jingjing Wu
2015-09-06 7:12 ` [dpdk-dev] [PATCH 46/52] i40e/base: remove useless assignments Jingjing Wu
2015-09-06 7:12 ` [dpdk-dev] [PATCH 47/52] i40e/base: Increase pf reset max loop limit Jingjing Wu
2015-09-06 7:12 ` [dpdk-dev] [PATCH 48/52] i40e/base: Add FortPark specific registers Jingjing Wu
2015-09-06 7:12 ` [dpdk-dev] [PATCH 49/52] i40e/base: Allow for per-device FW API version Jingjing Wu
2015-09-06 7:12 ` [dpdk-dev] [PATCH 50/52] i40e/base: Add ATR command bit definition for FortPark Jingjing Wu
2015-09-06 7:12 ` [dpdk-dev] [PATCH 51/52] i40e/base: Explicitly assign enum index for VSI type Jingjing Wu
2015-09-06 7:12 ` [dpdk-dev] [PATCH 52/52] eal/common: add new i40e device id Jingjing Wu
2015-09-09 1:53 ` [dpdk-dev] [PATCH 00/52] update i40e base driver Zhang, Helin
2015-10-01 23:38 ` Thomas Monjalon
2015-10-02 8:24 ` Mcnamara, John
2015-10-08 2:46 ` Wu, Jingjing
2015-09-16 7:45 ` Xu, HuilongX
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