From: Santosh Shukla <sshukla@mvista.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [ [PATCH v2] 03/13] rte_io: armv7/v8: Introduce api to emulate x86-style of PCI/ISA ioport access
Date: Mon, 14 Dec 2015 18:30:22 +0530 [thread overview]
Message-ID: <1450098032-21198-4-git-send-email-sshukla@mvista.com> (raw)
In-Reply-To: <1450098032-21198-1-git-send-email-sshukla@mvista.com>
Introducing rte_io.h header file to emulate x86-style of ioport rd/wr api
example {in,out}[bwl] and {in_p,out_p}[bwl]. Api support added for armv7 and
armv8 both.
Current use-case for this api is for virtio_pci module that does x86-style
rd/wr.
Tested for armv8/ThunderX platform and build successfully for armv7.
Signed-off-by: Santosh Shukla <sshukla@mvista.com>
---
lib/librte_eal/common/Makefile | 1 +
lib/librte_eal/common/include/arch/arm/rte_io.h | 60 ++++++++
lib/librte_eal/common/include/arch/arm/rte_io_32.h | 155 ++++++++++++++++++++
lib/librte_eal/common/include/arch/arm/rte_io_64.h | 155 ++++++++++++++++++++
lib/librte_eal/common/include/generic/rte_io.h | 81 ++++++++++
5 files changed, 452 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_io.h
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_io_32.h
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_io_64.h
create mode 100644 lib/librte_eal/common/include/generic/rte_io.h
diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile
index f5ea0ee..1021e1d 100644
--- a/lib/librte_eal/common/Makefile
+++ b/lib/librte_eal/common/Makefile
@@ -48,6 +48,7 @@ endif
GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h
GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_rwlock.h
+GENERIC_INC += rte_io.h
# defined in mk/arch/$(RTE_ARCH)/rte.vars.mk
ARCH_DIR ?= $(RTE_ARCH)
ARCH_INC := $(notdir $(wildcard $(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h))
diff --git a/lib/librte_eal/common/include/arch/arm/rte_io.h b/lib/librte_eal/common/include/arch/arm/rte_io.h
new file mode 100644
index 0000000..b4f1613
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_io.h
@@ -0,0 +1,60 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 Cavium Networks. All rights reserved.
+ * All rights reserved.
+ *
+ * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * ARM helper api to emulate x86-style of {in , out}[bwl] api used for
+ * accessing PCI/ISA IO address space.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_IO_ARM_H_
+#define _RTE_IO_ARM_H_
+
+/*
+ * @File
+ * Use-case:
+ * Currently virtio pci does IO access in x86-way i.e. IO_RESOURCE_IO way, It
+ * access the pci address space by port_number. The ARM doesn't have
+ * instructions for direct IO access. In ARM: IO's are memory mapped.
+ *
+ * Below helper api allow virtio_pci pmd driver to access IO's for arm/arm64
+ * arch in x86-style of apis example: {in , out}[bwl] and {in_p , out_p}[bwl].
+ */
+
+#ifdef RTE_ARCH_64
+#include <rte_io_64.h>
+#else
+#include <rte_io_32.h>
+#endif
+
+#endif /* _RTE_IO_ARM_H_ */
diff --git a/lib/librte_eal/common/include/arch/arm/rte_io_32.h b/lib/librte_eal/common/include/arch/arm/rte_io_32.h
new file mode 100644
index 0000000..0e79427
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_io_32.h
@@ -0,0 +1,155 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 Cavium Networks. All rights reserved.
+ * All rights reserved.
+ *
+ * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_IO_ARM32_H_
+#define _RTE_IO_ARM32_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_io.h"
+
+/*
+ * Generic IO read/write api for arm: Refer TRM
+ */
+static inline void raw_writeb(uint8_t val, uint32_t addr)
+{
+ asm volatile("strb %0, [%1]" : : "r" (val), "r" (addr));
+}
+
+static inline void raw_writew(uint16_t val, uint32_t addr)
+{
+ asm volatile("strh %0, [%1]" : : "r" (val), "r" (addr));
+}
+
+static inline void raw_writel(uint32_t val, uint32_t addr)
+{
+ asm volatile("str %0, [%1]" : : "r" (val), "r" (addr));
+}
+
+static inline uint8_t raw_readb(uint32_t addr)
+{
+ uint8_t val;
+ asm volatile("ldrb %0, [%1]" : "=r" (val) : "r" (addr));
+ return val;
+}
+
+static inline uint16_t raw_readw(uint32_t addr)
+{
+ uint16_t val;
+ asm volatile("ldrh %0, [%1]" : "=r" (val) : "r" (addr));
+ return val;
+}
+
+static inline uint32_t raw_readl(uint32_t addr)
+{
+ uint32_t val;
+ asm volatile("ldr %0, [%1]" : "=r" (val) : "r" (addr));
+ return val;
+}
+
+/**
+ * Emulate x86-style of ioport api implementation for arm/arm64. Included API
+ * - {in, out}{b, w, l}()
+ * - {in_p, out_p} {b, w, l} ()
+ */
+
+static inline uint8_t inb(unsigned long addr)
+{
+ return raw_readb(addr);
+}
+
+static inline uint16_t inw(unsigned long addr)
+{
+ return raw_readw(addr);
+}
+
+static inline uint32_t inl(unsigned long addr)
+{
+ return raw_readl(addr);
+}
+
+static inline void outb(uint8_t value, unsigned long addr)
+{
+ raw_writeb(value, addr);
+}
+
+static inline void outw(uint16_t value, unsigned long addr)
+{
+ raw_writew(value, addr);
+}
+
+static inline void outl(uint32_t value, unsigned long addr)
+{
+ raw_writel(value, addr);
+}
+
+static inline uint8_t inb_p(unsigned long addr)
+{
+ return inb(addr);
+}
+
+static inline uint16_t inw_p(unsigned long addr)
+{
+ return inw(addr);
+}
+
+static inline uint32_t inl_p(unsigned long addr)
+{
+ return inl(addr);
+}
+
+static inline void outb_p(uint8_t value, unsigned long addr)
+{
+ outb(value, addr);
+}
+
+static inline void outw_p(uint16_t value, unsigned long addr)
+{
+ outw(value, addr);
+}
+
+static inline void outl_p(uint32_t value, unsigned long addr)
+{
+ outl(value, addr);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_IO_ARM32_H_ */
diff --git a/lib/librte_eal/common/include/arch/arm/rte_io_64.h b/lib/librte_eal/common/include/arch/arm/rte_io_64.h
new file mode 100644
index 0000000..b601f2a
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_io_64.h
@@ -0,0 +1,155 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 Cavium Networks. All rights reserved.
+ * All rights reserved.
+ *
+ * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_IO_ARM64_H_
+#define _RTE_IO_ARM64_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_io.h"
+
+/*
+ * Generic IO read/write api for arm64: Refer TRM
+ */
+static inline void raw_writeb(uint8_t val, uint64_t addr)
+{
+ asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr));
+}
+
+static inline void raw_writew(uint16_t val, uint64_t addr)
+{
+ asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr));
+}
+
+static inline void raw_writel(uint32_t val, uint64_t addr)
+{
+ asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr));
+}
+
+static inline uint8_t raw_readb(uint64_t addr)
+{
+ uint8_t val;
+ asm volatile("ldrb %w0, [%1]" : "=r" (val) : "r" (addr));
+ return val;
+}
+
+static inline uint16_t raw_readw(uint64_t addr)
+{
+ uint16_t val;
+ asm volatile("ldrh %w0, [%1]" : "=r" (val) : "r" (addr));
+ return val;
+}
+
+static inline uint32_t raw_readl(uint64_t addr)
+{
+ uint32_t val;
+ asm volatile("ldr %w0, [%1]" : "=r" (val) : "r" (addr));
+ return val;
+}
+
+/**
+ * Emulate x86-style of ioport api implementation for arm/arm64. Included API
+ * - {in, out}{b, w, l}()
+ * - {in_p, out_p} {b, w, l} ()
+ */
+
+static inline uint8_t inb(unsigned long addr)
+{
+ return raw_readb(addr);
+}
+
+static inline uint16_t inw(unsigned long addr)
+{
+ return raw_readw(addr);
+}
+
+static inline uint32_t inl(unsigned long addr)
+{
+ return raw_readl(addr);
+}
+
+static inline void outb(uint8_t value, unsigned long addr)
+{
+ raw_writeb(value, addr);
+}
+
+static inline void outw(uint16_t value, unsigned long addr)
+{
+ raw_writew(value, addr);
+}
+
+static inline void outl(uint32_t value, unsigned long addr)
+{
+ raw_writel(value, addr);
+}
+
+static inline uint8_t inb_p(unsigned long addr)
+{
+ return inb(addr);
+}
+
+static inline uint16_t inw_p(unsigned long addr)
+{
+ return inw(addr);
+}
+
+static inline uint32_t inl_p(unsigned long addr)
+{
+ return inl(addr);
+}
+
+static inline void outb_p(uint8_t value, unsigned long addr)
+{
+ outb(value, addr);
+}
+
+static inline void outw_p(uint16_t value, unsigned long addr)
+{
+ outw(value, addr);
+}
+
+static inline void outl_p(uint32_t value, unsigned long addr)
+{
+ outl(value, addr);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_IO_ARM64_H_ */
diff --git a/lib/librte_eal/common/include/generic/rte_io.h b/lib/librte_eal/common/include/generic/rte_io.h
new file mode 100644
index 0000000..7cc4279
--- /dev/null
+++ b/lib/librte_eal/common/include/generic/rte_io.h
@@ -0,0 +1,81 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 Cavium Networks. All rights reserved.
+ * All rights reserved.
+ *
+ * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_IO_H_
+#define _RTE_IO_H_
+
+/**
+ * @file
+ *
+ * IO operations.
+ *
+ * This file defines an API for IO rd/wr inline-functions, API's of the style
+ * {in , out}[bwl] and {in_p, out_p} [bwl]. which are architecture-dependent.
+ * Used by non-x86 archs. In particular used by arm/arm64 arch.
+ */
+
+#include <stdint.h>
+
+#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
+#include <sys/io.h>
+#else
+
+/**
+ * Emulate x86-style of ioport api implementation for arm/arm64. Included API
+ * - {in, out}{b, w, l}()
+ * - {in_p, out_p} {b, w, l} ()
+ */
+
+static inline uint8_t inb(unsigned long addr);
+static inline uint16_t inw(unsigned long addr);
+static inline uint32_t inl(unsigned long addr);
+
+static inline void outb(uint8_t value, unsigned long addr);
+static inline void outw(uint16_t value, unsigned long addr);
+static inline void outl(uint32_t value, unsigned long addr);
+
+static inline uint8_t inb_p(unsigned long addr);
+static inline uint16_t inw_p(unsigned long addr);
+static inline uint32_t inl_p(unsigned long addr);
+
+static inline void outb_p(uint8_t value, unsigned long addr);
+static inline void outw_p(uint16_t value, unsigned long addr);
+static inline void outl_p(uint32_t value, unsigned long addr);
+
+#endif
+
+#endif /* _RTE_IO_H_ */
+
--
1.7.9.5
next prev parent reply other threads:[~2015-12-14 13:00 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-14 13:00 [dpdk-dev] [ [PATCH v2] 00/13] Add virtio support in arm/arm64 Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 01/13] virtio: Introduce config RTE_VIRTIO_INC_VECTOR Santosh Shukla
2015-12-17 12:02 ` Santosh Shukla
2015-12-17 12:03 ` Thomas Monjalon
2015-12-17 12:18 ` Santosh Shukla
2015-12-17 23:24 ` Stephen Hemminger
2015-12-18 1:31 ` Yuanhan Liu
2015-12-18 9:52 ` Xie, Huawei
2015-12-18 10:41 ` Thomas Monjalon
2015-12-18 17:33 ` Stephen Hemminger
2015-12-18 18:11 ` Thomas Monjalon
2015-12-18 12:46 ` Santosh Shukla
2015-12-22 6:26 ` Yuanhan Liu
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 02/13] config: i686: set RTE_VIRTIO_INC_VECTOR=n Santosh Shukla
2015-12-17 12:03 ` Santosh Shukla
2015-12-14 13:00 ` Santosh Shukla [this message]
2015-12-14 14:25 ` [dpdk-dev] [ [PATCH v2] 03/13] rte_io: armv7/v8: Introduce api to emulate x86-style of PCI/ISA ioport access Jerin Jacob
2015-12-14 16:29 ` Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 04/13] virtio_pci: use rte_io.h for non-x86 arch Santosh Shukla
2015-12-14 14:28 ` Jerin Jacob
2015-12-14 15:29 ` Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 05/13] virtio: change io_base datatype from uint32_t to uint64_type Santosh Shukla
2015-12-16 13:48 ` Yuanhan Liu
2015-12-16 14:01 ` Santosh Shukla
2015-12-16 14:23 ` Yuanhan Liu
2015-12-16 14:39 ` Santosh Shukla
2015-12-16 14:58 ` Yuanhan Liu
2015-12-16 15:05 ` Santosh Shukla
2015-12-17 7:19 ` Yuanhan Liu
2015-12-17 8:17 ` Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 06/13] config: armv7/v8: Enable RTE_LIBRTE_VIRTIO_PMD Santosh Shukla
2015-12-14 14:31 ` Jerin Jacob
2015-12-14 16:16 ` Santosh Shukla
2015-12-15 5:36 ` Jianbo Liu
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 07/13] linuxapp: eal: arm: Always return 0 for rte_eal_iopl_init() Santosh Shukla
2015-12-14 14:34 ` Jan Viktorin
2015-12-14 15:04 ` Santosh Shukla
2015-12-14 14:37 ` Jerin Jacob
2015-12-14 15:24 ` Santosh Shukla
2015-12-14 15:56 ` Jerin Jacob
2015-12-14 16:13 ` Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 08/13] rte_io: x86: Remove sys/io.h ifdef x86 clutter Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 09/13] igb_uio: ioport: map iopci region for armv7/v8 Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 10/13] include/exec-env: ioport: add rte_virt_ioport header file Santosh Shukla
2015-12-14 14:43 ` Jerin Jacob
2015-12-14 16:17 ` Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 11/13] virtio_ioport: armv7/v8: mmap virtio iopci bar region Santosh Shukla
2015-12-16 13:29 ` Yuanhan Liu
2015-12-16 14:20 ` Santosh Shukla
2015-12-16 14:37 ` Yuanhan Liu
2015-12-16 14:40 ` Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 12/13] virtio_ethdev: use virtio_ioport api at device init/close Santosh Shukla
2015-12-14 13:00 ` [dpdk-dev] [ [PATCH v2] 13/13] virtio_ethdev : fix format specifier error for 64bit addr case Santosh Shukla
2015-12-14 14:31 ` [dpdk-dev] [ [PATCH v2] 00/13] Add virtio support in arm/arm64 Jan Viktorin
2015-12-14 16:09 ` Santosh Shukla
2015-12-16 7:48 ` Santosh Shukla
2015-12-16 8:47 ` David Marchand
2015-12-16 11:43 ` Santosh Shukla
2015-12-16 12:31 ` [dpdk-dev] [PATCH] eal: map io resources for non x86 architectures David Marchand
2015-12-16 12:48 ` Yuanhan Liu
2015-12-16 13:34 ` David Marchand
2015-12-16 13:42 ` Yuanhan Liu
2015-12-16 13:51 ` Santosh Shukla
2015-12-17 9:38 ` Yuanhan Liu
2015-12-17 10:01 ` Santosh Shukla
2015-12-17 10:02 ` Santosh Shukla
2015-12-17 10:07 ` Santosh Shukla
2015-12-17 10:14 ` Thomas Monjalon
2015-12-17 10:21 ` Santosh Shukla
2015-12-17 10:33 ` Thomas Monjalon
2015-12-17 11:22 ` Santosh Shukla
2015-12-18 5:30 ` Yuanhan Liu
2015-12-18 6:34 ` Jerin Jacob
2015-12-18 7:55 ` Yuanhan Liu
2015-12-18 9:37 ` Thomas Monjalon
2015-12-18 7:54 ` Santosh Shukla
2015-12-18 8:21 ` Yuanhan Liu
2015-12-18 12:55 ` Santosh Shukla
2015-12-29 5:56 ` Santosh Shukla
2015-12-29 9:56 ` Burakov, Anatoly
2015-12-29 10:47 ` Santosh Shukla
2015-12-29 11:06 ` Burakov, Anatoly
2015-12-29 12:23 ` Santosh Shukla
2015-12-29 14:04 ` Alex Williamson
2015-12-29 14:51 ` Santosh Shukla
2015-12-31 14:27 ` Santosh Shukla
2015-12-16 13:15 ` Bruce Richardson
2015-12-16 13:29 ` David Marchand
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